基于开源EDA的AV1算法编码器设计

Tulio Pereira Bitencourt, Fábio Luís Livi Ramos, S. Bampi
{"title":"基于开源EDA的AV1算法编码器设计","authors":"Tulio Pereira Bitencourt, Fábio Luís Livi Ramos, S. Bampi","doi":"10.29292/jics.v17i2.564","DOIUrl":null,"url":null,"abstract":"With the increasing demand for video transmission through the Internet, video coding has become a key technology to allow this market's growth at a reduced cost. Moreover, with the inception of higher video resolutions (e.g., 4K, 8K) and their impact on video size, new video coding standards must tackle this issue to reduce video traffic demand on the global internet infrastructure. The AV1, a recently released royalties-free video coding format created by the Alliance for Open Media (AOMedia), reaches great compression rates but cannot accomplish real-time execution on software-only implementations due to its high complexity. This paper presents and analyzes AE-AV1, a high-performance 4-stage pipelined architecture to accelerate the AV1 arithmetic encoding process (part of the entropy encoder block) and make it capable of real-time execution. For the analysis, this work aims to rely on fully open-source Electronic Design Automation (EDA) tools and Package Design Kits (PDKs).","PeriodicalId":39974,"journal":{"name":"Journal of Integrated Circuits and Systems","volume":" ","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2022-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"AV1 Arithmetic Encoder Design on Open-Source EDA\",\"authors\":\"Tulio Pereira Bitencourt, Fábio Luís Livi Ramos, S. Bampi\",\"doi\":\"10.29292/jics.v17i2.564\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"With the increasing demand for video transmission through the Internet, video coding has become a key technology to allow this market's growth at a reduced cost. Moreover, with the inception of higher video resolutions (e.g., 4K, 8K) and their impact on video size, new video coding standards must tackle this issue to reduce video traffic demand on the global internet infrastructure. The AV1, a recently released royalties-free video coding format created by the Alliance for Open Media (AOMedia), reaches great compression rates but cannot accomplish real-time execution on software-only implementations due to its high complexity. This paper presents and analyzes AE-AV1, a high-performance 4-stage pipelined architecture to accelerate the AV1 arithmetic encoding process (part of the entropy encoder block) and make it capable of real-time execution. For the analysis, this work aims to rely on fully open-source Electronic Design Automation (EDA) tools and Package Design Kits (PDKs).\",\"PeriodicalId\":39974,\"journal\":{\"name\":\"Journal of Integrated Circuits and Systems\",\"volume\":\" \",\"pages\":\"\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-09-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Integrated Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.29292/jics.v17i2.564\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"Engineering\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Integrated Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.29292/jics.v17i2.564","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"Engineering","Score":null,"Total":0}
引用次数: 0

摘要

随着对通过互联网传输视频的需求不断增加,视频编码已成为以更低成本实现市场增长的关键技术。此外,随着更高视频分辨率(如4K、8K)的出现及其对视频大小的影响,新的视频编码标准必须解决这一问题,以减少全球互联网基础设施的视频流量需求。AV1是由开放媒体联盟(AOMedia)创建的一种最近发布的免版税视频编码格式,它达到了很高的压缩率,但由于其高复杂性,无法在纯软件实现上实现实时执行。本文提出并分析了AE-AV1,这是一种高性能的四级流水线结构,用于加速AV1算术编码过程(熵编码器块的一部分)并使其能够实时执行。为了进行分析,这项工作旨在依靠完全开源的电子设计自动化(EDA)工具和封装设计工具包(PDK)。
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AV1 Arithmetic Encoder Design on Open-Source EDA
With the increasing demand for video transmission through the Internet, video coding has become a key technology to allow this market's growth at a reduced cost. Moreover, with the inception of higher video resolutions (e.g., 4K, 8K) and their impact on video size, new video coding standards must tackle this issue to reduce video traffic demand on the global internet infrastructure. The AV1, a recently released royalties-free video coding format created by the Alliance for Open Media (AOMedia), reaches great compression rates but cannot accomplish real-time execution on software-only implementations due to its high complexity. This paper presents and analyzes AE-AV1, a high-performance 4-stage pipelined architecture to accelerate the AV1 arithmetic encoding process (part of the entropy encoder block) and make it capable of real-time execution. For the analysis, this work aims to rely on fully open-source Electronic Design Automation (EDA) tools and Package Design Kits (PDKs).
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来源期刊
Journal of Integrated Circuits and Systems
Journal of Integrated Circuits and Systems Engineering-Electrical and Electronic Engineering
CiteScore
0.90
自引率
0.00%
发文量
39
期刊介绍: This journal will present state-of-art papers on Integrated Circuits and Systems. It is an effort of both Brazilian Microelectronics Society - SBMicro and Brazilian Computer Society - SBC to create a new scientific journal covering Process and Materials, Device and Characterization, Design, Test and CAD of Integrated Circuits and Systems. The Journal of Integrated Circuits and Systems is published through Special Issues on subjects to be defined by the Editorial Board. Special issues will publish selected papers from both Brazilian Societies annual conferences, SBCCI - Symposium on Integrated Circuits and Systems and SBMicro - Symposium on Microelectronics Technology and Devices.
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