比特翻转对明文和密文深度神经网络精度影响的探讨

IF 2.8 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE IEEE Micro Pub Date : 2023-09-01 DOI:10.1109/MM.2023.3273115
Kyle Thomas, Muhammad Santriaji, David A. Mohaisen, Yan Solihin
{"title":"比特翻转对明文和密文深度神经网络精度影响的探讨","authors":"Kyle Thomas, Muhammad Santriaji, David A. Mohaisen, Yan Solihin","doi":"10.1109/MM.2023.3273115","DOIUrl":null,"url":null,"abstract":"Neural networks (NNs) are increasingly deployed to solve complex classification problems and produce accurate results on reliable systems. However, their accuracy quickly degrades in the presence of bit flips from memory errors or targeted attacks on dynamic random-access main memory. Prior work has shown that a few bit errors significantly reduce NN accuracies, but it is unclear which bits have an outsized impact on network accuracy and why. This article first investigates the relationship of the number representation for NN parameters with the impacts of bit flips on NN accuracy. We then explore the bit flip detection framework— four software-based error detectors that detect bit flips independent of NN topology. We discuss exciting findings and evaluate the various detectors’ efficacy, characteristics, and tradeoffs.","PeriodicalId":13100,"journal":{"name":"IEEE Micro","volume":"43 1","pages":"24-34"},"PeriodicalIF":2.8000,"publicationDate":"2023-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Exploration of Bitflip’s Effect on Deep Neural Network Accuracy in Plaintext and Ciphertext\",\"authors\":\"Kyle Thomas, Muhammad Santriaji, David A. Mohaisen, Yan Solihin\",\"doi\":\"10.1109/MM.2023.3273115\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Neural networks (NNs) are increasingly deployed to solve complex classification problems and produce accurate results on reliable systems. However, their accuracy quickly degrades in the presence of bit flips from memory errors or targeted attacks on dynamic random-access main memory. Prior work has shown that a few bit errors significantly reduce NN accuracies, but it is unclear which bits have an outsized impact on network accuracy and why. This article first investigates the relationship of the number representation for NN parameters with the impacts of bit flips on NN accuracy. We then explore the bit flip detection framework— four software-based error detectors that detect bit flips independent of NN topology. We discuss exciting findings and evaluate the various detectors’ efficacy, characteristics, and tradeoffs.\",\"PeriodicalId\":13100,\"journal\":{\"name\":\"IEEE Micro\",\"volume\":\"43 1\",\"pages\":\"24-34\"},\"PeriodicalIF\":2.8000,\"publicationDate\":\"2023-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Micro\",\"FirstCategoryId\":\"94\",\"ListUrlMain\":\"https://doi.org/10.1109/MM.2023.3273115\",\"RegionNum\":3,\"RegionCategory\":\"计算机科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Micro","FirstCategoryId":"94","ListUrlMain":"https://doi.org/10.1109/MM.2023.3273115","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0

摘要

神经网络被越来越多地用于解决复杂的分类问题,并在可靠的系统上产生准确的结果。然而,在内存错误或对动态随机存取主内存的有针对性攻击导致比特翻转的情况下,它们的准确性会迅速下降。先前的工作表明,一些比特错误会显著降低神经网络的精度,但尚不清楚哪些比特对网络精度有过大的影响以及原因。本文首先研究了神经网络参数的数字表示与比特翻转对神经网络精度的影响之间的关系。然后,我们探索了位翻转检测框架——四个基于软件的错误检测器,它们检测独立于NN拓扑的位翻转。我们讨论了令人兴奋的发现,并评估了各种探测器的功效、特性和权衡。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Exploration of Bitflip’s Effect on Deep Neural Network Accuracy in Plaintext and Ciphertext
Neural networks (NNs) are increasingly deployed to solve complex classification problems and produce accurate results on reliable systems. However, their accuracy quickly degrades in the presence of bit flips from memory errors or targeted attacks on dynamic random-access main memory. Prior work has shown that a few bit errors significantly reduce NN accuracies, but it is unclear which bits have an outsized impact on network accuracy and why. This article first investigates the relationship of the number representation for NN parameters with the impacts of bit flips on NN accuracy. We then explore the bit flip detection framework— four software-based error detectors that detect bit flips independent of NN topology. We discuss exciting findings and evaluate the various detectors’ efficacy, characteristics, and tradeoffs.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
IEEE Micro
IEEE Micro 工程技术-计算机:软件工程
CiteScore
7.50
自引率
0.00%
发文量
164
审稿时长
>12 weeks
期刊介绍: IEEE Micro addresses users and designers of microprocessors and microprocessor systems, including managers, engineers, consultants, educators, and students involved with computers and peripherals, components and subassemblies, communications, instrumentation and control equipment, and guidance systems. Contributions should relate to the design, performance, or application of microprocessors and microcomputers. Tutorials, review papers, and discussions are also welcome. Sample topic areas include architecture, communications, data acquisition, control, hardware and software design/implementation, algorithms (including program listings), digital signal processing, microprocessor support hardware, operating systems, computer aided design, languages, application software, and development systems.
期刊最新文献
Interconnect Design for Heterogeneous Integration of Chiplets in the AMD Instinct™ MI300X Accelerator ReDL: A Hybrid Memory System with Scalable Data Management Strategies for DNN Applications UCIe: Standard for an Open Chiplet Ecosystem Energy-Efficient Parallel Interconnects for Chiplet Integration Co-Design of Inter-Chiplet, Package, and System Interconnect Protocols
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1