A Charge Balanced Neural Stimulator Silicon Chip for Human-Machine Interface

This paper proposes a neural stimulator silicon chip design with an improved charge balancing technology. The proposed neural stimulation integrated circuit (IC) uses two charge balancing modules including synchronous charge detection module and short-time pulse insertion module. The synchronous charge detection module is designed based on a current splitter with ultra-small output current and an integrator circuit for neural stimulation pulse width control, which greatly reduces the residual charge remained on the electrode-tissue interface. The short-time pulse insertion module is designed based on the electrode voltage detection and compensation current control, which further reduces the accumulated residual charge and keeps the electrode voltage within a safety range of ±25 mV during multiple stimulation cycles. Finally, this neural stimulator is implemented in TSMC 0.18-μm CMOS process technology, and the chip function is tested and verified in both experiments with the electrode-tissue RC model and the PBS saline solution environment. The measurement result shows the neural stimulator chip achieves improved charge balancing with the residual charge smaller than 0.95 nC, which is the lowest compared to the traditional neural stimulator chips.