{"title":"用于节能计算的自旋电子器件专题","authors":"Jian-Ping Wang","doi":"10.1109/JXCDC.2023.3264859","DOIUrl":null,"url":null,"abstract":"The traditional scaling trend of semiconductor devices is approaching its limit with the node size in manufacturing already down to 2 nm, with a great guidance from Moore’s law. Heterogenous integration has recently been one of the major driving forces to push the semiconductor technologies further, with a great engineering effort to sum up the power of known and established technologies.","PeriodicalId":54149,"journal":{"name":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","volume":null,"pages":null},"PeriodicalIF":2.0000,"publicationDate":"2022-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/iel7/6570653/9998452/10102339.pdf","citationCount":"0","resultStr":"{\"title\":\"Special Topic on Spintronic Devices for Energy-Efficient Computing\",\"authors\":\"Jian-Ping Wang\",\"doi\":\"10.1109/JXCDC.2023.3264859\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The traditional scaling trend of semiconductor devices is approaching its limit with the node size in manufacturing already down to 2 nm, with a great guidance from Moore’s law. Heterogenous integration has recently been one of the major driving forces to push the semiconductor technologies further, with a great engineering effort to sum up the power of known and established technologies.\",\"PeriodicalId\":54149,\"journal\":{\"name\":\"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":2.0000,\"publicationDate\":\"2022-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/iel7/6570653/9998452/10102339.pdf\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10102339/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal on Exploratory Solid-State Computational Devices and Circuits","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10102339/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
Special Topic on Spintronic Devices for Energy-Efficient Computing
The traditional scaling trend of semiconductor devices is approaching its limit with the node size in manufacturing already down to 2 nm, with a great guidance from Moore’s law. Heterogenous integration has recently been one of the major driving forces to push the semiconductor technologies further, with a great engineering effort to sum up the power of known and established technologies.