同步降压DC-DC变换器的多尺度电磁兼容建模、仿真和验证

IF 1.8 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Journal on Multiscale and Multiphysics Computational Techniques Pub Date : 2023-06-05 DOI:10.1109/JMMCT.2023.3276358
Rajen Murugan;Jie Chen;Ambreesh Tripathi;Bibhu Prasad Nayak;Harikiran Muniganti;Dipanjan Gope
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引用次数: 2

摘要

随着汽车和工业应用中电力电子设备的普及,在满足电磁兼容性(EMC)监管标准方面提出了合规性挑战。在这项工作中,我们开发了一种鲁棒的多尺度系统级建模和仿真方法,用于预测CISPR 25的传导发射(CE)和辐射发射(RE)。该方法基于一种新的两阶段过程。在第一阶段,通过使用器件级物理模型的非线性时域仿真或示波器测量(如果有原型)来生成IC模型。在第二阶段,集成电路模型波形在模拟环境中使用,包括三维全波频域分析和专门为实验室设备准备的宏观模型。提出了在“低emi”高性能DCDC汽车/工业同步降压转换器上对CISPR 25 EMC测量的硅验证,以验证预测建模方法的完整性。建模和emc认证的测试实验室发射测量之间实现了良好的相关性(即CE在+/- 3 dBuV范围内,RE在+/- 6 dBuV范围内)。因此,可以在设计周期的早期实施预测EMC建模方法,以确保首次通过EMC兼容设计。
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Multiscale EMC Modeling, Simulation, and Validation of a Synchronous Step-Down DC-DC Converter
The proliferation of power electronics in automotive and industrial applications raises compliance challenges in meeting electromagnetic compatibility (EMC) regulatory standards. In this work, we develop a robust multiscale system-level modeling and simulation methodology for predicting CISPR 25 conducted emission (CE) and radiated emission (RE). The method is based on a novel two-stage process. In the first stage, the IC model is generated either by non-linear time-domain simulation using a device-level physics model or oscilloscope measurements if a prototype is available. In the second stage, the IC model waveforms are used in a simulation environment comprising 3D full-wave frequency domain analysis and specially prepared macro-models for the laboratory equipment. Silicon validation of CISPR 25 EMC measurements on a “low-EMI,” high-performance DCDC automotive/industrial synchronous step-down converter is presented to validate the integrity of the predictive modeling methodology. Good correlations between modeling and EMC-certified testing laboratory emission measurements are achieved (i.e., within +/- 3 dBuV for CE and +/- 6 dBuV for RE). As a result, the predictive EMC modeling methodology can be implemented, early in the design cycle, to ensure first-pass EMC-compliant design.
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CiteScore
4.30
自引率
0.00%
发文量
27
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