{"title":"15.5-ENOB 335 mVPP线性输入范围4.7-GΩ-输入阻抗CT-Δ∑M模拟前端,带嵌入式低频斩波","authors":"Yijie Li;Weiqi Zhi;Yuying Li;Jianhong Zhou;Zhiliang Hong;Jiawei Xu","doi":"10.1109/LSSC.2023.3318815","DOIUrl":null,"url":null,"abstract":"This article presents a second-order continuous-time delta-sigma (CT-\n<inline-formula> <tex-math>$\\Delta \\Sigma $ </tex-math></inline-formula>\n)-based analog front-end (AFE) for biopotential sensor interfaces. High linearity is achieved by using a current balanced \n<inline-formula> <tex-math>$G_{m,1}$ </tex-math></inline-formula>\n input stage with gain-boosting and cascode techniques. Low-frequency chopping embedded in gain-boosting OTAs breaks the limitation of chopping frequency in conventional CT-\n<inline-formula> <tex-math>$\\Delta \\Sigma $ </tex-math></inline-formula>\n ADCs and mitigates flicker noise without reducing the input impedance. In the second stage, the closed-loop \n<inline-formula> <tex-math>$G_{m,2}$ </tex-math></inline-formula>\n-OTA-C proportional integrator (PI) relaxes the linearity requirements of the OTA and eliminates the additional active adder. Fabricated in a standard 0.18-\n<inline-formula> <tex-math>$\\mu \\text{m}$ </tex-math></inline-formula>\n CMOS technology, this direct-digitization AFE achieves 94.9-dB peak SNDR, \n<inline-formula> <tex-math>$335 \\rm mV_{pp}$ </tex-math></inline-formula>\n linear input range, and 4.7-\n<inline-formula> <tex-math>$\\text{G}\\Omega $ </tex-math></inline-formula>\n input impedance at 50 Hz with \n<inline-formula> <tex-math>$64\\times $ </tex-math></inline-formula>\n reduction in the chopping frequency.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":"6 ","pages":"265-268"},"PeriodicalIF":2.2000,"publicationDate":"2023-09-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 15.5-ENOB 335 mVPP-Linear-Input-Range 4.7-GΩ-Input-Impedance CT-ΔΣM Analog Front-End With Embedded Low-Frequency Chopping\",\"authors\":\"Yijie Li;Weiqi Zhi;Yuying Li;Jianhong Zhou;Zhiliang Hong;Jiawei Xu\",\"doi\":\"10.1109/LSSC.2023.3318815\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This article presents a second-order continuous-time delta-sigma (CT-\\n<inline-formula> <tex-math>$\\\\Delta \\\\Sigma $ </tex-math></inline-formula>\\n)-based analog front-end (AFE) for biopotential sensor interfaces. High linearity is achieved by using a current balanced \\n<inline-formula> <tex-math>$G_{m,1}$ </tex-math></inline-formula>\\n input stage with gain-boosting and cascode techniques. Low-frequency chopping embedded in gain-boosting OTAs breaks the limitation of chopping frequency in conventional CT-\\n<inline-formula> <tex-math>$\\\\Delta \\\\Sigma $ </tex-math></inline-formula>\\n ADCs and mitigates flicker noise without reducing the input impedance. In the second stage, the closed-loop \\n<inline-formula> <tex-math>$G_{m,2}$ </tex-math></inline-formula>\\n-OTA-C proportional integrator (PI) relaxes the linearity requirements of the OTA and eliminates the additional active adder. Fabricated in a standard 0.18-\\n<inline-formula> <tex-math>$\\\\mu \\\\text{m}$ </tex-math></inline-formula>\\n CMOS technology, this direct-digitization AFE achieves 94.9-dB peak SNDR, \\n<inline-formula> <tex-math>$335 \\\\rm mV_{pp}$ </tex-math></inline-formula>\\n linear input range, and 4.7-\\n<inline-formula> <tex-math>$\\\\text{G}\\\\Omega $ </tex-math></inline-formula>\\n input impedance at 50 Hz with \\n<inline-formula> <tex-math>$64\\\\times $ </tex-math></inline-formula>\\n reduction in the chopping frequency.\",\"PeriodicalId\":13032,\"journal\":{\"name\":\"IEEE Solid-State Circuits Letters\",\"volume\":\"6 \",\"pages\":\"265-268\"},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2023-09-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Solid-State Circuits Letters\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10261423/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10261423/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
A 15.5-ENOB 335 mVPP-Linear-Input-Range 4.7-GΩ-Input-Impedance CT-ΔΣM Analog Front-End With Embedded Low-Frequency Chopping
This article presents a second-order continuous-time delta-sigma (CT-
$\Delta \Sigma $
)-based analog front-end (AFE) for biopotential sensor interfaces. High linearity is achieved by using a current balanced
$G_{m,1}$
input stage with gain-boosting and cascode techniques. Low-frequency chopping embedded in gain-boosting OTAs breaks the limitation of chopping frequency in conventional CT-
$\Delta \Sigma $
ADCs and mitigates flicker noise without reducing the input impedance. In the second stage, the closed-loop
$G_{m,2}$
-OTA-C proportional integrator (PI) relaxes the linearity requirements of the OTA and eliminates the additional active adder. Fabricated in a standard 0.18-
$\mu \text{m}$
CMOS technology, this direct-digitization AFE achieves 94.9-dB peak SNDR,
$335 \rm mV_{pp}$
linear input range, and 4.7-
$\text{G}\Omega $
input impedance at 50 Hz with
$64\times $
reduction in the chopping frequency.