用于局部CNT合成的CMOS-MEMS微加热器的后CMOS工艺挑战和设计发展。

IF 7.3 1区 工程技术 Q1 INSTRUMENTS & INSTRUMENTATION Microsystems & Nanoengineering Pub Date : 2023-11-06 eCollection Date: 2023-01-01 DOI:10.1038/s41378-023-00598-w
Avisek Roy, Bao Q Ta, Mehdi Azadmehr, Knut E Aasmundtveit
{"title":"用于局部CNT合成的CMOS-MEMS微加热器的后CMOS工艺挑战和设计发展。","authors":"Avisek Roy, Bao Q Ta, Mehdi Azadmehr, Knut E Aasmundtveit","doi":"10.1038/s41378-023-00598-w","DOIUrl":null,"url":null,"abstract":"<p><p>Carbon nanotubes (CNTs) can be locally grown on custom-designed CMOS microheaters by a thermal chemical vapour deposition (CVD) process to utilize the sensing capabilities of CNTs in emerging micro- and nanotechnology applications. For such a direct CMOS-CNT integration, a key requirement is the development of necessary post-processing steps on CMOS chips for fabricating CMOS-MEMS polysilicon heaters that can locally generate the required CNT synthesis temperatures (~650-900 °C). In our post-CMOS processing, a subtractive fabrication technique is used for micromachining the polysilicon heaters, where the passivation layers in CMOS are used as masks to protect the electronics. For dielectric etching, it is necessary to achieve high selectivity, uniform etching and a good etch rate to fully expose the polysilicon layers without causing damage. We achieved successful post-CMOS processing by developing two-step reactive ion etching (RIE) of the SiO<sub>2</sub> dielectric layer and making design improvements to a second-generation CMOS chip. After the dry etching process, CMOS-MEMS microheaters are partially suspended by SiO<sub>2</sub> wet etching with minimum damage to the exposed aluminium layers, to obtain high thermal isolation. The fabricated microheaters are then successfully utilized for synthesizing CNTs by a local thermal CVD process. The CMOS post-processing challenges and design aspects to fabricate CMOS-MEMS polysilicon microheaters for such high-temperature applications are detailed in this article. Our developed process for heterogeneous monolithic integration of CMOS-CNT shows promise for wafer-level manufacturing of CNT-based sensors by incorporating additional steps in an already existing foundry CMOS process.</p>","PeriodicalId":18560,"journal":{"name":"Microsystems & Nanoengineering","volume":"9 ","pages":"136"},"PeriodicalIF":7.3000,"publicationDate":"2023-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10625928/pdf/","citationCount":"1","resultStr":"{\"title\":\"Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis.\",\"authors\":\"Avisek Roy, Bao Q Ta, Mehdi Azadmehr, Knut E Aasmundtveit\",\"doi\":\"10.1038/s41378-023-00598-w\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p><p>Carbon nanotubes (CNTs) can be locally grown on custom-designed CMOS microheaters by a thermal chemical vapour deposition (CVD) process to utilize the sensing capabilities of CNTs in emerging micro- and nanotechnology applications. For such a direct CMOS-CNT integration, a key requirement is the development of necessary post-processing steps on CMOS chips for fabricating CMOS-MEMS polysilicon heaters that can locally generate the required CNT synthesis temperatures (~650-900 °C). In our post-CMOS processing, a subtractive fabrication technique is used for micromachining the polysilicon heaters, where the passivation layers in CMOS are used as masks to protect the electronics. For dielectric etching, it is necessary to achieve high selectivity, uniform etching and a good etch rate to fully expose the polysilicon layers without causing damage. We achieved successful post-CMOS processing by developing two-step reactive ion etching (RIE) of the SiO<sub>2</sub> dielectric layer and making design improvements to a second-generation CMOS chip. After the dry etching process, CMOS-MEMS microheaters are partially suspended by SiO<sub>2</sub> wet etching with minimum damage to the exposed aluminium layers, to obtain high thermal isolation. The fabricated microheaters are then successfully utilized for synthesizing CNTs by a local thermal CVD process. The CMOS post-processing challenges and design aspects to fabricate CMOS-MEMS polysilicon microheaters for such high-temperature applications are detailed in this article. Our developed process for heterogeneous monolithic integration of CMOS-CNT shows promise for wafer-level manufacturing of CNT-based sensors by incorporating additional steps in an already existing foundry CMOS process.</p>\",\"PeriodicalId\":18560,\"journal\":{\"name\":\"Microsystems & Nanoengineering\",\"volume\":\"9 \",\"pages\":\"136\"},\"PeriodicalIF\":7.3000,\"publicationDate\":\"2023-11-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://www.ncbi.nlm.nih.gov/pmc/articles/PMC10625928/pdf/\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microsystems & Nanoengineering\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://doi.org/10.1038/s41378-023-00598-w\",\"RegionNum\":1,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"2023/1/1 0:00:00\",\"PubModel\":\"eCollection\",\"JCR\":\"Q1\",\"JCRName\":\"INSTRUMENTS & INSTRUMENTATION\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microsystems & Nanoengineering","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1038/s41378-023-00598-w","RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2023/1/1 0:00:00","PubModel":"eCollection","JCR":"Q1","JCRName":"INSTRUMENTS & INSTRUMENTATION","Score":null,"Total":0}
引用次数: 1

摘要

碳纳米管(CNT)可以通过热化学气相沉积(CVD)工艺在定制设计的CMOS微加热器上局部生长,以在新兴的微米和纳米技术应用中利用CNT的传感能力。对于这种直接的CMOS-CNT集成,一个关键要求是在CMOS芯片上开发必要的后处理步骤,用于制造CMOS-MEMS多晶硅加热器,该加热器可以局部产生所需的CNT合成温度(~650-900 °C)。在我们的后CMOS工艺中,减法制造技术被用于对多晶硅加热器进行微加工,其中CMOS中的钝化层被用作掩模来保护电子器件。对于电介质蚀刻,需要实现高选择性、均匀蚀刻和良好的蚀刻速率,以完全暴露多晶硅层而不造成损坏。我们通过开发SiO2介电层的两步反应离子蚀刻(RIE)并对第二代CMOS芯片进行设计改进,成功实现了后CMOS工艺。在干法蚀刻工艺之后,CMOS-MEMS微加热器通过SiO2湿法蚀刻部分悬浮,对暴露的铝层的损伤最小,以获得高度的热隔离。然后通过局部热CVD工艺成功地利用所制造的微加热器来合成CNT。本文详细介绍了用于此类高温应用的CMOS后处理挑战和制造CMOS-MEMS多晶硅微加热器的设计方面。我们开发的CMOS-CNT异质单片集成工艺通过在现有的铸造CMOS工艺中加入额外的步骤,有望实现基于CNT的传感器的晶圆级制造。
本文章由计算机程序翻译,如有差异,请以英文原文为准。

摘要图片

摘要图片

摘要图片

查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Post-CMOS processing challenges and design developments of CMOS-MEMS microheaters for local CNT synthesis.

Carbon nanotubes (CNTs) can be locally grown on custom-designed CMOS microheaters by a thermal chemical vapour deposition (CVD) process to utilize the sensing capabilities of CNTs in emerging micro- and nanotechnology applications. For such a direct CMOS-CNT integration, a key requirement is the development of necessary post-processing steps on CMOS chips for fabricating CMOS-MEMS polysilicon heaters that can locally generate the required CNT synthesis temperatures (~650-900 °C). In our post-CMOS processing, a subtractive fabrication technique is used for micromachining the polysilicon heaters, where the passivation layers in CMOS are used as masks to protect the electronics. For dielectric etching, it is necessary to achieve high selectivity, uniform etching and a good etch rate to fully expose the polysilicon layers without causing damage. We achieved successful post-CMOS processing by developing two-step reactive ion etching (RIE) of the SiO2 dielectric layer and making design improvements to a second-generation CMOS chip. After the dry etching process, CMOS-MEMS microheaters are partially suspended by SiO2 wet etching with minimum damage to the exposed aluminium layers, to obtain high thermal isolation. The fabricated microheaters are then successfully utilized for synthesizing CNTs by a local thermal CVD process. The CMOS post-processing challenges and design aspects to fabricate CMOS-MEMS polysilicon microheaters for such high-temperature applications are detailed in this article. Our developed process for heterogeneous monolithic integration of CMOS-CNT shows promise for wafer-level manufacturing of CNT-based sensors by incorporating additional steps in an already existing foundry CMOS process.

求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
Microsystems & Nanoengineering
Microsystems & Nanoengineering Materials Science-Materials Science (miscellaneous)
CiteScore
12.00
自引率
3.80%
发文量
123
审稿时长
20 weeks
期刊介绍: Microsystems & Nanoengineering is a comprehensive online journal that focuses on the field of Micro and Nano Electro Mechanical Systems (MEMS and NEMS). It provides a platform for researchers to share their original research findings and review articles in this area. The journal covers a wide range of topics, from fundamental research to practical applications. Published by Springer Nature, in collaboration with the Aerospace Information Research Institute, Chinese Academy of Sciences, and with the support of the State Key Laboratory of Transducer Technology, it is an esteemed publication in the field. As an open access journal, it offers free access to its content, allowing readers from around the world to benefit from the latest developments in MEMS and NEMS.
期刊最新文献
Bifunctional nanoprobe for simultaneous detection of intracellular reactive oxygen species and temperature in single cells. Sound innovations for biofabrication and tissue engineering. A novel gyroscope based on the slow surface acoustic wave in a phononic metamaterial. Defect-insensitive cylindrical surface lattice resonance array and its batch replication for enhanced immunoassay. Biomimetic hair-assisted GaN optical devices for bidirectional airflow detection.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1