{"title":"用于线性时间可编程分选的混合模数电路","authors":"G. Oddone, S. Rovetta, G. Uneddu, R. Zunino","doi":"10.1109/ISCAS.1997.621538","DOIUrl":null,"url":null,"abstract":"The paper describes a VLSI circuit for sorting analog quantities. The circuit yields analog representations of sorted values and digitally encodes the corresponding ranks in the list. The length of the sorted list can be digitally programmed at run time, hence partial sortings are also supported. The modular, mixed analog/digital structure is arranged into elementary cells operating at the local level. This greatly facilitates the layout design. A suitable coupling of current-mode and voltage-mode signals minimizes the number of transistors.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"20 3","pages":"1968-1971 vol.3"},"PeriodicalIF":0.0000,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/ISCAS.1997.621538","citationCount":"6","resultStr":"{\"title\":\"Mixed analog-digital circuit for linear-time programmable sorting\",\"authors\":\"G. Oddone, S. Rovetta, G. Uneddu, R. Zunino\",\"doi\":\"10.1109/ISCAS.1997.621538\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper describes a VLSI circuit for sorting analog quantities. The circuit yields analog representations of sorted values and digitally encodes the corresponding ranks in the list. The length of the sorted list can be digitally programmed at run time, hence partial sortings are also supported. The modular, mixed analog/digital structure is arranged into elementary cells operating at the local level. This greatly facilitates the layout design. A suitable coupling of current-mode and voltage-mode signals minimizes the number of transistors.\",\"PeriodicalId\":68559,\"journal\":{\"name\":\"电路与系统学报\",\"volume\":\"20 3\",\"pages\":\"1968-1971 vol.3\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-06-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://sci-hub-pdf.com/10.1109/ISCAS.1997.621538\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"电路与系统学报\",\"FirstCategoryId\":\"1093\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.1997.621538\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"电路与系统学报","FirstCategoryId":"1093","ListUrlMain":"https://doi.org/10.1109/ISCAS.1997.621538","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Mixed analog-digital circuit for linear-time programmable sorting
The paper describes a VLSI circuit for sorting analog quantities. The circuit yields analog representations of sorted values and digitally encodes the corresponding ranks in the list. The length of the sorted list can be digitally programmed at run time, hence partial sortings are also supported. The modular, mixed analog/digital structure is arranged into elementary cells operating at the local level. This greatly facilitates the layout design. A suitable coupling of current-mode and voltage-mode signals minimizes the number of transistors.