{"title":"采用嵌入式处理器的1v lsi电源管理技术","authors":"S. Shigematsu, S. Mutoh, Y. Matsuya","doi":"10.1109/CICC.1996.510523","DOIUrl":null,"url":null,"abstract":"A new power management technique is proposed for low-power, high-speed LSIs. This technique reduces the power consumption and enhances the performance of an LSI by using an embedded small processor to control the sleep modes and the processing of the LSI. Using this technique for a low-power DSP, the total power is reduced to about 10% of one without this technique, while maintaining the speed performance in 1-V LSIs.","PeriodicalId":74515,"journal":{"name":"Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference","volume":"31 1","pages":"111-114"},"PeriodicalIF":0.0000,"publicationDate":"1996-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"Power management technique for 1-V LSIs using embedded processor\",\"authors\":\"S. Shigematsu, S. Mutoh, Y. Matsuya\",\"doi\":\"10.1109/CICC.1996.510523\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new power management technique is proposed for low-power, high-speed LSIs. This technique reduces the power consumption and enhances the performance of an LSI by using an embedded small processor to control the sleep modes and the processing of the LSI. Using this technique for a low-power DSP, the total power is reduced to about 10% of one without this technique, while maintaining the speed performance in 1-V LSIs.\",\"PeriodicalId\":74515,\"journal\":{\"name\":\"Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference\",\"volume\":\"31 1\",\"pages\":\"111-114\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-05-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1996.510523\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1996.510523","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Power management technique for 1-V LSIs using embedded processor
A new power management technique is proposed for low-power, high-speed LSIs. This technique reduces the power consumption and enhances the performance of an LSI by using an embedded small processor to control the sleep modes and the processing of the LSI. Using this technique for a low-power DSP, the total power is reduced to about 10% of one without this technique, while maintaining the speed performance in 1-V LSIs.