K. Koli, J. Jussila, P. Sivonen, Sami Kallioinen, A. Pärssinen
{"title":"900MHz直接ΔΣ接收器在65nm CMOS","authors":"K. Koli, J. Jussila, P. Sivonen, Sami Kallioinen, A. Pärssinen","doi":"10.1109/ISSCC.2010.5434049","DOIUrl":null,"url":null,"abstract":"A 900 MHz direct-conversion receiver with a ΔΣ feedback loop to RF occupies an active area of 1.2 mm<sup>2</sup> in 65 nm CMOS. The concept prototype for low-band cellular operations achieves NF of 2.3 and 6.2 dB in conventional and ΔΣ modes, respectively, and out-of-band IIP3 up to ±4 dBm when the ΔΣ loop is active. The chip consumes 80 mW from a 1.2 V supply.","PeriodicalId":6418,"journal":{"name":"2010 IEEE International Solid-State Circuits Conference - (ISSCC)","volume":"22 1","pages":"64-65"},"PeriodicalIF":0.0000,"publicationDate":"2010-03-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"A 900MHz direct ΔΣ receiver in 65nm CMOS\",\"authors\":\"K. Koli, J. Jussila, P. Sivonen, Sami Kallioinen, A. Pärssinen\",\"doi\":\"10.1109/ISSCC.2010.5434049\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 900 MHz direct-conversion receiver with a ΔΣ feedback loop to RF occupies an active area of 1.2 mm<sup>2</sup> in 65 nm CMOS. The concept prototype for low-band cellular operations achieves NF of 2.3 and 6.2 dB in conventional and ΔΣ modes, respectively, and out-of-band IIP3 up to ±4 dBm when the ΔΣ loop is active. The chip consumes 80 mW from a 1.2 V supply.\",\"PeriodicalId\":6418,\"journal\":{\"name\":\"2010 IEEE International Solid-State Circuits Conference - (ISSCC)\",\"volume\":\"22 1\",\"pages\":\"64-65\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-03-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 IEEE International Solid-State Circuits Conference - (ISSCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2010.5434049\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE International Solid-State Circuits Conference - (ISSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2010.5434049","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 900 MHz direct-conversion receiver with a ΔΣ feedback loop to RF occupies an active area of 1.2 mm2 in 65 nm CMOS. The concept prototype for low-band cellular operations achieves NF of 2.3 and 6.2 dB in conventional and ΔΣ modes, respectively, and out-of-band IIP3 up to ±4 dBm when the ΔΣ loop is active. The chip consumes 80 mW from a 1.2 V supply.
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