{"title":"高线性四象限模拟BiCMOS乘法器±1.5 V供电操作","authors":"J. Ramírez-Angulo","doi":"10.1049/EL:19921137","DOIUrl":null,"url":null,"abstract":"A highly linear four-quadrant analogue BiCMOS multiplier is presented. It operates with ±1.5V supplies and with 2V peak to peak input and output signal wings. It is based on the use of crosscoupled, voltage biased differential pairs. Experimental results of a CMOS test chip are presented that confirm the proposed structure.","PeriodicalId":91083,"journal":{"name":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","volume":"16 1","pages":"1467-1470"},"PeriodicalIF":0.0000,"publicationDate":"1992-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"32","resultStr":"{\"title\":\"Highly Linear Four Quadrant Analog BiCMOS Multiplier for ± 1.5 V Supply Operation\",\"authors\":\"J. Ramírez-Angulo\",\"doi\":\"10.1049/EL:19921137\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A highly linear four-quadrant analogue BiCMOS multiplier is presented. It operates with ±1.5V supplies and with 2V peak to peak input and output signal wings. It is based on the use of crosscoupled, voltage biased differential pairs. Experimental results of a CMOS test chip are presented that confirm the proposed structure.\",\"PeriodicalId\":91083,\"journal\":{\"name\":\"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems\",\"volume\":\"16 1\",\"pages\":\"1467-1470\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-09-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"32\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1049/EL:19921137\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1049/EL:19921137","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Highly Linear Four Quadrant Analog BiCMOS Multiplier for ± 1.5 V Supply Operation
A highly linear four-quadrant analogue BiCMOS multiplier is presented. It operates with ±1.5V supplies and with 2V peak to peak input and output signal wings. It is based on the use of crosscoupled, voltage biased differential pairs. Experimental results of a CMOS test chip are presented that confirm the proposed structure.
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