{"title":"高速接口的电源噪声诱发抖动建模与优化","authors":"D. Oh, Yujeong Shim, Guang Chen","doi":"10.1109/CICC.2015.7338439","DOIUrl":null,"url":null,"abstract":"• Issues and challenges in power distribution network design • Basics of power supply induced jitter (PSIJ) modeling — Power distribution network (PDN) modeling — Jitter sensitivity function modeling • PSIJ design and modeling for key applications — Memory and parallel bus interfaces — Serial links — Digital logic timing.","PeriodicalId":6665,"journal":{"name":"2015 IEEE Custom Integrated Circuits Conference (CICC)","volume":"386 1","pages":"1-42"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Supply noise induced jitter modeling and optimization for high-speed interfaces\",\"authors\":\"D. Oh, Yujeong Shim, Guang Chen\",\"doi\":\"10.1109/CICC.2015.7338439\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"• Issues and challenges in power distribution network design • Basics of power supply induced jitter (PSIJ) modeling — Power distribution network (PDN) modeling — Jitter sensitivity function modeling • PSIJ design and modeling for key applications — Memory and parallel bus interfaces — Serial links — Digital logic timing.\",\"PeriodicalId\":6665,\"journal\":{\"name\":\"2015 IEEE Custom Integrated Circuits Conference (CICC)\",\"volume\":\"386 1\",\"pages\":\"1-42\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE Custom Integrated Circuits Conference (CICC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2015.7338439\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Custom Integrated Circuits Conference (CICC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2015.7338439","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Supply noise induced jitter modeling and optimization for high-speed interfaces
• Issues and challenges in power distribution network design • Basics of power supply induced jitter (PSIJ) modeling — Power distribution network (PDN) modeling — Jitter sensitivity function modeling • PSIJ design and modeling for key applications — Memory and parallel bus interfaces — Serial links — Digital logic timing.
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