{"title":"晶圆级芯片级封装的激光多光束全切割","authors":"J. V. Borkulo, Eric Tan, R. D. Stam","doi":"10.1109/ECTC.2017.76","DOIUrl":null,"url":null,"abstract":"The introduction of Chip Scale Package (CSP) has become one of the key packaging solutions in the recent semiconductor industry. With the advantages of reducing the package size and stacking capability for higher interconnects, CSP's are continuously evolving into many different types of CSP's packages. One of the key innovative package solutions is the molded wafer level CSP (M-WLCSP)1,2 due to the robust 5 sided or 6 sided protection of the devices with epoxy mold compound (EMC). The advantages of this application include, prevention of chipping and handling damage, sort screening capability due to its form factor at the wafer level, and the enhancement in board level reliability.3 The current singulation method that is the mechanical blade dicing process is encountering many challenges including yield loss, blade lifetime, productivity and its' limitation to achieve a narrow kerf width). In this paper we will share the results of the various studies done to develop a full cut laser dicing process for M-WLCSP and the impact of various parameters on the process flow, quality, productivity and cost. Together with an end customer reliability testing has been done on laser diced M-WLCSP packages of which the results will demonstrate that all criteria are met.","PeriodicalId":6557,"journal":{"name":"2017 IEEE 67th Electronic Components and Technology Conference (ECTC)","volume":"8 1","pages":"337-342"},"PeriodicalIF":0.0000,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Laser Multi Beam Full Cut Dicing of Wafer Level Chip-Scale Packages\",\"authors\":\"J. V. Borkulo, Eric Tan, R. D. Stam\",\"doi\":\"10.1109/ECTC.2017.76\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The introduction of Chip Scale Package (CSP) has become one of the key packaging solutions in the recent semiconductor industry. With the advantages of reducing the package size and stacking capability for higher interconnects, CSP's are continuously evolving into many different types of CSP's packages. One of the key innovative package solutions is the molded wafer level CSP (M-WLCSP)1,2 due to the robust 5 sided or 6 sided protection of the devices with epoxy mold compound (EMC). The advantages of this application include, prevention of chipping and handling damage, sort screening capability due to its form factor at the wafer level, and the enhancement in board level reliability.3 The current singulation method that is the mechanical blade dicing process is encountering many challenges including yield loss, blade lifetime, productivity and its' limitation to achieve a narrow kerf width). In this paper we will share the results of the various studies done to develop a full cut laser dicing process for M-WLCSP and the impact of various parameters on the process flow, quality, productivity and cost. Together with an end customer reliability testing has been done on laser diced M-WLCSP packages of which the results will demonstrate that all criteria are met.\",\"PeriodicalId\":6557,\"journal\":{\"name\":\"2017 IEEE 67th Electronic Components and Technology Conference (ECTC)\",\"volume\":\"8 1\",\"pages\":\"337-342\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE 67th Electronic Components and Technology Conference (ECTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.2017.76\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE 67th Electronic Components and Technology Conference (ECTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2017.76","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Laser Multi Beam Full Cut Dicing of Wafer Level Chip-Scale Packages
The introduction of Chip Scale Package (CSP) has become one of the key packaging solutions in the recent semiconductor industry. With the advantages of reducing the package size and stacking capability for higher interconnects, CSP's are continuously evolving into many different types of CSP's packages. One of the key innovative package solutions is the molded wafer level CSP (M-WLCSP)1,2 due to the robust 5 sided or 6 sided protection of the devices with epoxy mold compound (EMC). The advantages of this application include, prevention of chipping and handling damage, sort screening capability due to its form factor at the wafer level, and the enhancement in board level reliability.3 The current singulation method that is the mechanical blade dicing process is encountering many challenges including yield loss, blade lifetime, productivity and its' limitation to achieve a narrow kerf width). In this paper we will share the results of the various studies done to develop a full cut laser dicing process for M-WLCSP and the impact of various parameters on the process flow, quality, productivity and cost. Together with an end customer reliability testing has been done on laser diced M-WLCSP packages of which the results will demonstrate that all criteria are met.