{"title":"利用遗传编程对物理不可克隆函数的模型构建攻击","authors":"I. Saha, Ratan Rahul Jeldi, R. Chakraborty","doi":"10.1109/HST.2013.6581563","DOIUrl":null,"url":null,"abstract":"Design, implementation and characterization of Physically Unclonable Functions (PUFs) in silicon have drawn considerable research interest in recent years. However, side-by-side, there are concerns that these PUF circuits, although physically unclonable, might be vulnerable to computational model-building attacks that compromise their security. In this work, we have used ideas from evolutionary computation, specifically genetic programming, to build accurate and compact mathematical models to approximate the response of FPGA-based ring oscillator PUFs (RO-PUFs). Hence, we have demonstrated the feasibility of a computationally simple scheme to model FPGA-based PUFs, and we believe this work will pave the way for similar attempts to attack more sophisticated PUF implementations.","PeriodicalId":6337,"journal":{"name":"2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST)","volume":"15 1","pages":"41-44"},"PeriodicalIF":0.0000,"publicationDate":"2013-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"29","resultStr":"{\"title\":\"Model building attacks on Physically Unclonable Functions using genetic programming\",\"authors\":\"I. Saha, Ratan Rahul Jeldi, R. Chakraborty\",\"doi\":\"10.1109/HST.2013.6581563\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Design, implementation and characterization of Physically Unclonable Functions (PUFs) in silicon have drawn considerable research interest in recent years. However, side-by-side, there are concerns that these PUF circuits, although physically unclonable, might be vulnerable to computational model-building attacks that compromise their security. In this work, we have used ideas from evolutionary computation, specifically genetic programming, to build accurate and compact mathematical models to approximate the response of FPGA-based ring oscillator PUFs (RO-PUFs). Hence, we have demonstrated the feasibility of a computationally simple scheme to model FPGA-based PUFs, and we believe this work will pave the way for similar attempts to attack more sophisticated PUF implementations.\",\"PeriodicalId\":6337,\"journal\":{\"name\":\"2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST)\",\"volume\":\"15 1\",\"pages\":\"41-44\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-06-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"29\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HST.2013.6581563\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HST.2013.6581563","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Model building attacks on Physically Unclonable Functions using genetic programming
Design, implementation and characterization of Physically Unclonable Functions (PUFs) in silicon have drawn considerable research interest in recent years. However, side-by-side, there are concerns that these PUF circuits, although physically unclonable, might be vulnerable to computational model-building attacks that compromise their security. In this work, we have used ideas from evolutionary computation, specifically genetic programming, to build accurate and compact mathematical models to approximate the response of FPGA-based ring oscillator PUFs (RO-PUFs). Hence, we have demonstrated the feasibility of a computationally simple scheme to model FPGA-based PUFs, and we believe this work will pave the way for similar attempts to attack more sophisticated PUF implementations.