Analysis and modeling of sequential circuits in QCA nano computing: RAM and SISO register study

Quantum-dot cellular automata (QCA) is a foremost archetype of field-coupled nanoscale devices. It is a non-von-Neumann, minimal energy dissipated model for conventional nano computing by transistor free logic. The field-coupled nanoscale models rely on limited field connections among nanoscale building modules which are organized in forms to complete convenient assessments. A fundamental device in QCA is termed as a cell is created from a structure of coupled dots by a few flexible charges and the charge arrangement initiates a bit, and quantum charge channeling inside a squared cell permits device shifting. QCA operation approves extreme device thicknesses, room temperature implementation, and higher switching speeds. We propose an inventive design of two commonly used sequential circuits, namely random access memory (RAM) and serial-in/serial-out (SISO) register in this study. Noteworthy enhancements in terms of extent, cell intricacy, latency, and cost have been attained in both designs. Thorough performance assessment and analysis are achieved in several aspects to substantiate the designed circuits having an outstanding operation in contrast to existing studies. QCADesigner and QCAPro tools have been utilized to confirm the precise functionality of the outlined architectures.