一个0.8V 0.8mm2蓝牙5/BLE数字密集型收发器,带有2.3mW相位跟踪RX,采用混合环路滤波器,在40nm CMOS中具有抗干扰能力

M. Ding, Xiaoyang Wang, P. Zhang, Yuming He, Stefano Traferro, K. Shibata, Minyoung Song, Hannu Korpela, Keisuke Ueda, Yao-Hong Liu, Christian Bachmann, K. Philips
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Operating a BLE RF transceiver at a lower VDD (e.g., <0.85V) not only extends the battery life by up to 50% [3], and reduces the Power-Management-Unit complexity, but also can accommodate a wider range of energy sources (e.g., harvesters). A recent single-channel phase-tracking RX [5] demonstrated a potential to reduce the chip area and the power consumption at a VDD down to 0.85V. However, it suffers from a degraded sensitivity due to a poor deviation frequency control and an excessive loop delay, limited ACR (Adjacent-Channel-Rejection) due to the digitally-controlled-oscillator (DCO) side-lobe energy, and an undefined initial carrier frequency due to the lack of a PLL/FLL that could have a risk of tracking to an interference. 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引用次数: 27

摘要

本文介绍了一种用于物联网应用的低压(0.8V)超低功耗蓝牙5(BT5)/低功耗蓝牙(BLE)数字密集型收发器。与BLE相比,BT5具有2倍高的数据速率和4倍长的范围,而>具有8倍长的数据包。BLE现有技术[1-5]在最小化功耗以延长电池寿命以及芯片面积方面做出了重大努力。然而,现有技术的笛卡尔BLE无线电消耗即6至10mW[1-3],以实现1.0V)。在较低的VDD(例如<0.85V)下操作BLE RF收发器不仅可以延长电池寿命高达50%,降低电源管理单元的复杂性,而且还可以适应更广泛的能源(例如采集器)。最近的一项单通道相位跟踪RX[5]显示了将VDD的芯片面积和功耗降低到0.85V的潜力。然而,由于差的频率偏差控制和过度的环路延迟,它的灵敏度下降,由于数字控制振荡器(DCO)旁瓣能量有限的ACR(邻接通道抑制),以及由于缺乏可能有跟踪干扰风险的锁相环/非锁相环而导致的初始载波频率不确定。本文提出了一种完全集成的0.8V相域BT5/ ble组合收发器,包括物理层数字基带(DBB),并通过采用两种关键技术解决了上述问题:1)采用带环路延迟补偿的混合环路滤波器抑制DCO旁瓣,增强干扰容错性;2)采用基于全数字PLL(ADPLL)的数字调频接口,在RX和TX之间共享,包括偏差频率校准,并精确定义初始频率。此外,还演示了支持分组模式相位跟踪RX操作的物理层DBB。
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A 0.8V 0.8mm2 bluetooth 5/BLE digital-intensive transceiver with a 2.3mW phase-tracking RX utilizing a hybrid loop filter for interference resilience in 40nm CMOS
This paper presents a low-voltage (0.8V) ultra-low-power Bluetooth 5(BT5)/Bluetooth Low Energy(BLE) digitally-intensive transceiver for IoT applications. In comparison to BLE, BT5 has a 2x higher data-rate and 4x longer range, while having >8x longer packet. The BLE prior arts [1-5] have made significant efforts to minimize the power consumption for longer battery life, as well as the chip area. However, the prior-art Cartesian BLE radios consume namely 6 to 10mW [1-3] to achieve a <-94dBm sensitivity but with a relatively high supply voltage (VDD) (>1.0V). Operating a BLE RF transceiver at a lower VDD (e.g., <0.85V) not only extends the battery life by up to 50% [3], and reduces the Power-Management-Unit complexity, but also can accommodate a wider range of energy sources (e.g., harvesters). A recent single-channel phase-tracking RX [5] demonstrated a potential to reduce the chip area and the power consumption at a VDD down to 0.85V. However, it suffers from a degraded sensitivity due to a poor deviation frequency control and an excessive loop delay, limited ACR (Adjacent-Channel-Rejection) due to the digitally-controlled-oscillator (DCO) side-lobe energy, and an undefined initial carrier frequency due to the lack of a PLL/FLL that could have a risk of tracking to an interference. This work presents a fully-integrated 0.8V phase-domain BT5/BLE-combo transceiver, including a PHY-layer digital baseband (DBB), and addresses the above-mentioned issues by employing two key techniques: 1) a hybrid loop filter with a loop-delay compensation for DCO side-lobe suppression to enhance interference tolerance, and 2) an all-digital PLL(ADPLL)-based digital FM interface shared between RX and TX is employed, including a deviation frequency calibration, and it also precisely defines the initial frequency. Moreover, the PHY-layer DBB that supports a packet-mode phase-tracking RX operation is also demonstrated.
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