{"title":"用于有损有线数据链路的多音/单边带串行链路收发器的架构建模","authors":"Gain Kim, Y. Leblebici","doi":"10.1109/APCCAS.2016.7803923","DOIUrl":null,"url":null,"abstract":"This paper presents a serial link transceiver (TRX) architecture that enables high-speed data transmission over a lossy backplane channel without the presence of equalization circuits. The proposed architecture employs multi-tone signaling to reduce inter-symbol interference (ISI) and to increase receiver (RX) timing margin. A single-sideband (SSB) modulation has also been employed for saving of required bandwidth per sub-channel, so as to minimize inter-channel interference (ICI). System-level simulation results show that the proposed TRX can easily transmit 20 Gb/s data stream over a lossy backplane channel that exhibits 28-dB attenuation at 10 GHz while requiring neither of continuous-time linear equalizer (CTLE) and decision feedback equalizer (DFE). By transmitting 3-to-5 Gb/s data stream over each of four sub-channels, at least 44% unit interval (UI) eye openings are achieved for all sub-channels when 20 Gb/s aggregate data is transmitted.","PeriodicalId":6495,"journal":{"name":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Architectural modeling of a multi-tone/single-sideband serial link transceiver for lossy wireline data links\",\"authors\":\"Gain Kim, Y. Leblebici\",\"doi\":\"10.1109/APCCAS.2016.7803923\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a serial link transceiver (TRX) architecture that enables high-speed data transmission over a lossy backplane channel without the presence of equalization circuits. The proposed architecture employs multi-tone signaling to reduce inter-symbol interference (ISI) and to increase receiver (RX) timing margin. A single-sideband (SSB) modulation has also been employed for saving of required bandwidth per sub-channel, so as to minimize inter-channel interference (ICI). System-level simulation results show that the proposed TRX can easily transmit 20 Gb/s data stream over a lossy backplane channel that exhibits 28-dB attenuation at 10 GHz while requiring neither of continuous-time linear equalizer (CTLE) and decision feedback equalizer (DFE). By transmitting 3-to-5 Gb/s data stream over each of four sub-channels, at least 44% unit interval (UI) eye openings are achieved for all sub-channels when 20 Gb/s aggregate data is transmitted.\",\"PeriodicalId\":6495,\"journal\":{\"name\":\"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APCCAS.2016.7803923\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.2016.7803923","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Architectural modeling of a multi-tone/single-sideband serial link transceiver for lossy wireline data links
This paper presents a serial link transceiver (TRX) architecture that enables high-speed data transmission over a lossy backplane channel without the presence of equalization circuits. The proposed architecture employs multi-tone signaling to reduce inter-symbol interference (ISI) and to increase receiver (RX) timing margin. A single-sideband (SSB) modulation has also been employed for saving of required bandwidth per sub-channel, so as to minimize inter-channel interference (ICI). System-level simulation results show that the proposed TRX can easily transmit 20 Gb/s data stream over a lossy backplane channel that exhibits 28-dB attenuation at 10 GHz while requiring neither of continuous-time linear equalizer (CTLE) and decision feedback equalizer (DFE). By transmitting 3-to-5 Gb/s data stream over each of four sub-channels, at least 44% unit interval (UI) eye openings are achieved for all sub-channels when 20 Gb/s aggregate data is transmitted.