{"title":"一个中频采样SC复合低通σ δ调制器,具有高图像抑制电容共享","authors":"W. Cheng, K. Pun, C. Chan, O. Choy","doi":"10.1109/ISCAS.2004.1328401","DOIUrl":null,"url":null,"abstract":"Lowpass complex sigma-delta (/spl Sigma//spl Delta/) modulators that have a built-in mixer can be used to digitize narrowband intermediate frequency (IF) signals in radios and cellular systems. A well-known problem of the complex modulators is the mismatches between the in-phase (I) and quadrature phase (Q) channels. In this paper, a technique of sharing the critical sampling and feedback capacitors between the I and Q channels of the modulator is proposed. As demonstrated by circuit simulations, the mismatch effect can be greatly suppressed and thus the image rejection performance can be improved. A 3/sup rd/ order complex modulator is designed with a 0.35/spl mu/m CMOS technology for a 10.7MHz IF input.","PeriodicalId":91083,"journal":{"name":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","volume":"6 1","pages":"1140-1143"},"PeriodicalIF":0.0000,"publicationDate":"2004-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharing\",\"authors\":\"W. Cheng, K. Pun, C. Chan, O. Choy\",\"doi\":\"10.1109/ISCAS.2004.1328401\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Lowpass complex sigma-delta (/spl Sigma//spl Delta/) modulators that have a built-in mixer can be used to digitize narrowband intermediate frequency (IF) signals in radios and cellular systems. A well-known problem of the complex modulators is the mismatches between the in-phase (I) and quadrature phase (Q) channels. In this paper, a technique of sharing the critical sampling and feedback capacitors between the I and Q channels of the modulator is proposed. As demonstrated by circuit simulations, the mismatch effect can be greatly suppressed and thus the image rejection performance can be improved. A 3/sup rd/ order complex modulator is designed with a 0.35/spl mu/m CMOS technology for a 10.7MHz IF input.\",\"PeriodicalId\":91083,\"journal\":{\"name\":\"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems\",\"volume\":\"6 1\",\"pages\":\"1140-1143\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-05-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.2004.1328401\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2004.1328401","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharing
Lowpass complex sigma-delta (/spl Sigma//spl Delta/) modulators that have a built-in mixer can be used to digitize narrowband intermediate frequency (IF) signals in radios and cellular systems. A well-known problem of the complex modulators is the mismatches between the in-phase (I) and quadrature phase (Q) channels. In this paper, a technique of sharing the critical sampling and feedback capacitors between the I and Q channels of the modulator is proposed. As demonstrated by circuit simulations, the mismatch effect can be greatly suppressed and thus the image rejection performance can be improved. A 3/sup rd/ order complex modulator is designed with a 0.35/spl mu/m CMOS technology for a 10.7MHz IF input.