{"title":"具有奇模数Sub-FD的高模量电流复用注入锁定分频器(FDs)","authors":"S. Jang, W. Lai, M. Juang","doi":"10.1109/ICICM54364.2021.9660255","DOIUrl":null,"url":null,"abstract":"This letter studies high-modulus LC injection-locked frequency dividers (ILFDs) designed with the current-reused technique, which uses two sub-circuits sharing the same dc current and device components. The current-reused ILFDs use one divide-by-3 ILFD and they include $\\div 6, \\div 9$ and $\\div 10$ ILFDs. These circuits cannot be obtained by cascading even-modulus ILFDs. Since the supply current to one sub-ILFD is limited by the other sub-ILFD, the design of a sub-circuit is different from the design of the voltage-mode ILFD. The current-reused $\\div 6$ ILFD was designed in the TSMC 0.18 $\\mu \\mathrm{m}$ BiCMOS process. It is based on a $\\div 2$ LC p-core ILFD stacking on a $\\div 3$ LC n-core capacitive cross-coupled ILFD. At the drain-source bias VDD of 1.6/1.2 V and at the incident power of 0dBm, the locking range is 3/2GHz (23.62/15.87%), from the incident frequency 11.2/11.6 GHz to 14.2/13.6 GHz. The core power consumption is 17. 47/6.312mW and the die area is $0.988 \\times 1.0185 \\mathrm{mm}^{2}$.","PeriodicalId":6693,"journal":{"name":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"1 1","pages":"357-361"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"High-modulus Current-reused Injection-Locked Frequency Dividers (FDs) with an Odd-modulus Sub-FD\",\"authors\":\"S. Jang, W. Lai, M. Juang\",\"doi\":\"10.1109/ICICM54364.2021.9660255\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This letter studies high-modulus LC injection-locked frequency dividers (ILFDs) designed with the current-reused technique, which uses two sub-circuits sharing the same dc current and device components. The current-reused ILFDs use one divide-by-3 ILFD and they include $\\\\div 6, \\\\div 9$ and $\\\\div 10$ ILFDs. These circuits cannot be obtained by cascading even-modulus ILFDs. Since the supply current to one sub-ILFD is limited by the other sub-ILFD, the design of a sub-circuit is different from the design of the voltage-mode ILFD. The current-reused $\\\\div 6$ ILFD was designed in the TSMC 0.18 $\\\\mu \\\\mathrm{m}$ BiCMOS process. It is based on a $\\\\div 2$ LC p-core ILFD stacking on a $\\\\div 3$ LC n-core capacitive cross-coupled ILFD. At the drain-source bias VDD of 1.6/1.2 V and at the incident power of 0dBm, the locking range is 3/2GHz (23.62/15.87%), from the incident frequency 11.2/11.6 GHz to 14.2/13.6 GHz. The core power consumption is 17. 47/6.312mW and the die area is $0.988 \\\\times 1.0185 \\\\mathrm{mm}^{2}$.\",\"PeriodicalId\":6693,\"journal\":{\"name\":\"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"volume\":\"1 1\",\"pages\":\"357-361\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-10-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICM54364.2021.9660255\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM54364.2021.9660255","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
本文研究了采用电流重用技术设计的高模量LC注入锁定分频器(ilfd),该技术使用两个子电路共享相同的直流电流和器件组件。当前重用的ILFD使用一个除以3的ILFD,它们包括$\div 6, \div 9$和$\div 10$ ILFD。这些电路不能通过级联偶模ilfd获得。由于一个子ILFD的供电电流受到另一个子ILFD的限制,因此子电路的设计不同于电压型ILFD的设计。在TSMC 0.18 $\mu \mathrm{m}$ BiCMOS工艺中设计了电流复用$\div 6$ ILFD。它基于$\div 2$ LC p核ILFD叠加在$\div 3$ LC n核电容交叉耦合ILFD上。在漏源偏置VDD为1.6/1.2 V、入射功率为0dBm时,锁定范围为3/2GHz (23.62/15.87)%), from the incident frequency 11.2/11.6 GHz to 14.2/13.6 GHz. The core power consumption is 17. 47/6.312mW and the die area is $0.988 \times 1.0185 \mathrm{mm}^{2}$.
High-modulus Current-reused Injection-Locked Frequency Dividers (FDs) with an Odd-modulus Sub-FD
This letter studies high-modulus LC injection-locked frequency dividers (ILFDs) designed with the current-reused technique, which uses two sub-circuits sharing the same dc current and device components. The current-reused ILFDs use one divide-by-3 ILFD and they include $\div 6, \div 9$ and $\div 10$ ILFDs. These circuits cannot be obtained by cascading even-modulus ILFDs. Since the supply current to one sub-ILFD is limited by the other sub-ILFD, the design of a sub-circuit is different from the design of the voltage-mode ILFD. The current-reused $\div 6$ ILFD was designed in the TSMC 0.18 $\mu \mathrm{m}$ BiCMOS process. It is based on a $\div 2$ LC p-core ILFD stacking on a $\div 3$ LC n-core capacitive cross-coupled ILFD. At the drain-source bias VDD of 1.6/1.2 V and at the incident power of 0dBm, the locking range is 3/2GHz (23.62/15.87%), from the incident frequency 11.2/11.6 GHz to 14.2/13.6 GHz. The core power consumption is 17. 47/6.312mW and the die area is $0.988 \times 1.0185 \mathrm{mm}^{2}$.