优化孔隙填充，增强与互连集成流的兼容性

2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM) Pub Date : 2015-05-18 DOI:10.1109/IITC-MAM.2015.7325639

J. de Marneffe, L. Zhang, V. Rutigliani, G. Noya, Y. Cao, A. Lesniewska, O. Pedreira, K. Croes, C. Gillot, Z. Tokei, J. Boemmels, M. Baklanov

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引用次数: 1

摘要

多孔órgano-silicate爱荷华电介质的等离子体处理，遵循大马士革方法。仍然是集成电路制造面临的最大挑战之一。在低k等离子体蚀刻过程中。活性自由基(O*， F*等)和VUV很容易渗透到多孔的低k结构中，与Si-CH3终止键反应，最终使蚀刻的低k亲水，并使综合k值超出可接受的范围。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Optimized pore stuffing for enhanced compatibility with interconnect integration flow

Plasma processing of porous órgano-silicate Iowie dielectrics, following the damascene approach. remains one the biggest challenge for IC manufacturing. During low-k plasma etching. reactive radicals (O*, F* amongst others) and VUV penetrate easily into the porous low-k structure, reacting with Si-CH3 terminating bonds, ultimately turning the etched low-k hydrophilic and raising the integrated k-value beyond acceptable limits.

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2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM)

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