30fJ/转换步长8b 0- 10ms /s异步SAR ADC在90nm CMOS

2010 IEEE International Solid-State Circuits Conference - (ISSCC) Pub Date : 2010-03-18 DOI:10.1109/ISSCC.2010.5433967

P. Harpe, Cui Zhou, Xiaoyang Wang, G. Dolmans, H. D. Groot

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引用次数: 93

摘要

无线传感器节点等应用需要超低功耗接收器和高能效adc。此外，应该在广泛的采样率范围内保持功率效率，以实现系统级的灵活性。此前，已提出将SAR adc用于低功耗应用[1]，[2]。这项工作描述了一个8位异步SAR ADC的实现，该ADC在10kS/s和10MS/s之间的采样率下实现了30fJ/转换步长功率效率。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 30fJ/conversion-step 8b 0-to-10MS/s asynchronous SAR ADC in 90nm CMOS

Applications like wireless sensor nodes require ultra low-power receivers with power-efficient ADCs. Moreover, the power-efficiency should be maintained for a wide range of sampling rates to enable system-level flexibility. Previously, the use of SAR ADCs has been proposed for low-power applications [1], [2]. This work describes the implementation of an 8bit asynchronous SAR ADC that achieves a 30fJ/Conversion-step power-efficiency for sampling rates between 10kS/s and 10MS/s.

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2010 IEEE International Solid-State Circuits Conference - (ISSCC)

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