Design method and automation of comparator generation for flash A/D converter

The design methods and the automation of the comparator circuit layout generation for a flash A/D converter are presented in this paper. The threshold inverter quantization (TIQ) based A/D converters require 2/sup n/ - 1 comparators, each one different from all others. Optimal design method of the TIQ comparator presented in this paper significantly improves the linearity of the A/D converter against the CMOS process variation. Especially the DNL dependence on the CMOS process variation can be almost eliminated. The design method has been incorporated into a software package and the 2/sup n/ - 1 optimized TIQ comparator layouts are generated as an output of the software package. The simulation results are presented to show the effectiveness of the design methods. Also, the prototype chip has been fabricated, with initial test results confirming the DNL reduction.