{"title":"分流抑制的电流模式实现","authors":"A. Moini, A. Bouzerdoum, K. Esbraghian","doi":"10.1109/ISCAS.1997.608810","DOIUrl":null,"url":null,"abstract":"In this paper we present a current-mode VLSI implementation of shunting inhibition. Our approach uses translinear circuit design techniques using MOS transistors operating in the subthreshold region. Compared to previous implementations our design achieves a larger dynamic range and also clearly demonstrates the dependence of the spatio-temporal response of the network on the input light mean-intensity. A 64-cell one-dimensional array of the SI circuit has been implemented and fabricated in a 2/spl mu/ CMOS process. Hspice simulation results as well as test results obtained from the chip are presented and discussed.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"55 1","pages":"557-560 vol.1"},"PeriodicalIF":0.0000,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"A current mode implementation of shunting inhibition\",\"authors\":\"A. Moini, A. Bouzerdoum, K. Esbraghian\",\"doi\":\"10.1109/ISCAS.1997.608810\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we present a current-mode VLSI implementation of shunting inhibition. Our approach uses translinear circuit design techniques using MOS transistors operating in the subthreshold region. Compared to previous implementations our design achieves a larger dynamic range and also clearly demonstrates the dependence of the spatio-temporal response of the network on the input light mean-intensity. A 64-cell one-dimensional array of the SI circuit has been implemented and fabricated in a 2/spl mu/ CMOS process. Hspice simulation results as well as test results obtained from the chip are presented and discussed.\",\"PeriodicalId\":68559,\"journal\":{\"name\":\"电路与系统学报\",\"volume\":\"55 1\",\"pages\":\"557-560 vol.1\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-06-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"电路与系统学报\",\"FirstCategoryId\":\"1093\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.1997.608810\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"电路与系统学报","FirstCategoryId":"1093","ListUrlMain":"https://doi.org/10.1109/ISCAS.1997.608810","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
摘要
在本文中,我们提出了一个电流模式的VLSI实现分流抑制。我们的方法使用在亚阈值区域工作的MOS晶体管的跨线性电路设计技术。与以前的实现相比,我们的设计实现了更大的动态范围,也清楚地表明了网络的时空响应对输入光平均强度的依赖。在2/spl μ m / CMOS工艺下,实现并制作了64单元SI电路的一维阵列。给出并讨论了该芯片的Hspice仿真结果和测试结果。
A current mode implementation of shunting inhibition
In this paper we present a current-mode VLSI implementation of shunting inhibition. Our approach uses translinear circuit design techniques using MOS transistors operating in the subthreshold region. Compared to previous implementations our design achieves a larger dynamic range and also clearly demonstrates the dependence of the spatio-temporal response of the network on the input light mean-intensity. A 64-cell one-dimensional array of the SI circuit has been implemented and fabricated in a 2/spl mu/ CMOS process. Hspice simulation results as well as test results obtained from the chip are presented and discussed.