查找表更快的三阶屏蔽

Anju Alexander, Annapurna Valiveti, S. Vivek
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引用次数: 0

摘要

使用查找表屏蔽s盒是一种有效的对策,以阻止在软件中实现的分组密码的侧信道攻击。在一级和二级,基于表的掩蔽(TBM)方案可以非常有效,甚至比基于电路的掩蔽方案更快。自定制二阶TBM方案提出以来,重点一直是设计和优化基于高阶表的掩蔽(HO-TBM)方案,以促进任意顺序的掩蔽。这种趋势的原因之一是,在大订单HO-TBM方案明显较慢,并且与基于电路的掩蔽方案(如位切片掩蔽)相比,消耗了大量的RAM内存,因此努力的目标是这个方向。然而,Valiveti和Vivek (TCHES 2021)最近的一项工作表明,Coron等人(TCHES 2018)的HO-TBM方案可以在具有预处理能力和竞争性在线执行时间的内存受限设备上实现。然而,目前,没有定制的三阶TBM设计比实例化三阶HO-TBM方案更有效。在这项工作中,我们提出了任意s盒的三阶TBM方案,该方案在探测模型和组合下是安全的,即3-SNI安全。与最先进的HO-TBM方案的三阶实例化相比,它在总体运行时间方面非常有效。它还支持预处理功能。例如,在32位ARM-Cortex M4微控制器上单次执行三阶掩码AES-128的总运行时间减少了约80%,而在线执行时间没有任何开销。这意味着所提出方案的在线执行时间大约比三阶位切片掩码实现快8倍,并且与Wang等人(TCHES 2022)最近利用共享重用的方案相当。给出了三阶掩码present密码的实现结果。我们的工作表明,在低阶下,HO-TBM方案的性能有很大的调整余地。
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A Faster Third-Order Masking of Lookup Tables
Masking of S-boxes using lookup tables is an effective countermeasure to thwart side-channel attacks on block ciphers implemented in software. At first and second orders, the Table-based Masking (TBM) schemes can be very efficient and even faster than circuit-based masking schemes. Ever since the customised second-order TBM schemes were proposed, the focus has been on designing and optimising Higher-Order Table-based Masking (HO-TBM) schemes that facilitate masking at arbitrary order. One of the reasons for this trend is that at large orders HO-TBM schemes are significantly slower and consume a prohibitive amount of RAM memory compared to circuit-based masking schemes such as bit-sliced masking, and hence efforts were targeted in this direction. However, a recent work due to Valiveti and Vivek (TCHES 2021) has demonstrated that the HO-TBM scheme of Coron et al. (TCHES 2018) is feasible to be implemented on memory-constrained devices with pre-processing capability and a competitive online execution time. Yet, currently, there are no customised designs for third-order TBM that are more efficient than instantiating a HO-TBM scheme at third order.In this work, we propose a third-order TBM scheme for arbitrary S-boxes that is secure in the probing model and under compositions, i.e., 3-SNI secure. It is very efficient in terms of the overall running time, compared to the third-order instantiations of state-of-the-art HO-TBM schemes. It also supports the pre-processing functionality. For example, the overall running time of a single execution of the third-order masked AES-128 on a 32-bit ARM-Cortex M4 micro-controller is reduced by about 80% without any overhead on the online execution time. This implies that the online execution time of the proposed scheme is approximately eight times faster than the bit-sliced masked implementation at third order, and it is comparable to the recent scheme of Wang et al. (TCHES 2022) that makes use of reuse of shares. We also present the implementation results for the third-order masked PRESENT cipher. Our work suggests that there is a significant scope for tuning the performance of HO-TBM schemes at lower orders.
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