Technology advancement of laminate substrates for mobile, iot, and automotive applications

The increasing level of integration in electronic devices requires high density package substrates with good electrical and thermal performance, and high reliability. Organic laminate substrates have been serving these requirements with their continuous improvements in terms of the material characteristics and fabrication process to realize multi-layer fine pattern interconnects and small form factor. We present the advanced coreless laminate substrates in this paper including 3-layer thin substrate built by ETS (Embedded Trace Substrate) technology, 3-layer SUTC (Simmtech Ultra-Thin substrate with Carrier) for fan-out chip last package, and 3-layer coreless substrate with HSR (High modulus Solder Resist) for reduced warpage. We also present new coreless substrates up to 10 layers and substrate based on EMC. These new laminate substrates are used in many different applications such as application processors, memory, CMOS image sensors, touch screen controllers, MEMS, and RF SIP(System in Package) for over 70GHz applications. One common challenge for all these substrates is to minimize the warpage. The analysis and simulation techniques for the warpage control are presented.