Design and Synthesis of A FPGA Based Controller Dependent Analog Data Acquisition System

This paper presents design and implementation of Analog Data Acquisition System based on Field Programming Gate Array and 12 bit Analog Digital Conversion Chip ADC128S002. Research presents soft core Universal Asynchronous Receiver Transmitter (UART) model and an additional soft core acquisition model to transmit acquired data at high data baud rate. This paper mostly focused on hardware design and system architecture. Acquisition system is developed using Very high speed integrated circuit Hardware Description Language (VHDL). This system is able to provide converted digital data to the external environment through serial data communication at baud rate 115200. In association this design leaves a choice to configure a maximum number of channels at run time through application protocol which will be used by the controller periodically.