{"title":"低噪声高速自适应输出驱动器的设计过程","authors":"C. Choy, C.F. Chan, M. Ku, J. Povazanec","doi":"10.1109/ISCAS.1997.621494","DOIUrl":null,"url":null,"abstract":"This paper presents a design procedure of a high-frequency output driver with low power-bus noise and with an architecture which automatically adapts to different loading. In depth analysis of a noise amplitude versus driving power as a first stage of design is included and the theoretical approach is supported by simulation and measurement results of a designed and manufactured device.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"277 1","pages":"1796-1799 vol.3"},"PeriodicalIF":0.0000,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":"{\"title\":\"Design procedure of low-noise high-speed adaptive output drivers\",\"authors\":\"C. Choy, C.F. Chan, M. Ku, J. Povazanec\",\"doi\":\"10.1109/ISCAS.1997.621494\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a design procedure of a high-frequency output driver with low power-bus noise and with an architecture which automatically adapts to different loading. In depth analysis of a noise amplitude versus driving power as a first stage of design is included and the theoretical approach is supported by simulation and measurement results of a designed and manufactured device.\",\"PeriodicalId\":68559,\"journal\":{\"name\":\"电路与系统学报\",\"volume\":\"277 1\",\"pages\":\"1796-1799 vol.3\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-06-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"19\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"电路与系统学报\",\"FirstCategoryId\":\"1093\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.1997.621494\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"电路与系统学报","FirstCategoryId":"1093","ListUrlMain":"https://doi.org/10.1109/ISCAS.1997.621494","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design procedure of low-noise high-speed adaptive output drivers
This paper presents a design procedure of a high-frequency output driver with low power-bus noise and with an architecture which automatically adapts to different loading. In depth analysis of a noise amplitude versus driving power as a first stage of design is included and the theoretical approach is supported by simulation and measurement results of a designed and manufactured device.
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