三维大规模集成电路晶圆级多芯片堆叠的纳米级薄膜控制低温高耐热无熔合研究

2012 IEEE 62nd Electronic Components and Technology Conference Pub Date : 2012-07-30 DOI:10.1109/ECTC.2012.6248799

E. Morinaga, Y. Oka, H. Nishimori, H. Miyagawa, R. Satoh, Y. Iwata, R. Kanezaki

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引用次数: 4

摘要

三维封装系统(3D-SiP)被认为是解决半导体行业缩放限制问题的一种很有前途的方法。3D-SiP的实际实现需要建立一种标准的芯片堆叠键合技术。本研究利用高沸点醇、铟锡(InSn)薄膜及其转化为高熔点金属间化合物(IMC)，研究了一种克服芯片/晶圆中凹凸高度变化问题的低温高耐热无熔点键合方法。实验研究表明，在高熔点处(大于673K)，高速率沉积InSn合金和连续沉积银可以成功结合。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Study of low temperature and high heat-resistant fluxless bonding via nanoscale thin film control toward wafer-level multiple chip stacking for 3D LSI

The three dimensional system in package (3D-SiP) has been regarded as a promising solution to the scaling limit problem in the semiconductor industry. Practical realization of the 3D-SiP needs establishing a standard bonding technology for chip stacking. This research focuses on a low temperature and high heat-resistant fluxless bonding method, which can overcome the bump height variation problem in a chip/wafer, using high-boiling alcohol, an indium-tin (InSn) thin film and its transformation into high-melting intermetallic compound (IMC). Experimental studies showed high-rate deposition of InSn alloy and successive deposition of silver achieve successful bonding where the joint has high melting point (higher than 673K).

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