Daniel Brüderle, Johannes Bill, Bernhard A. Kaplan, J. Kremkow, K. Meier, Eric Müller, J. Schemmel
{"title":"现场演示:用混合信号VLSI系统探索皮质网络架构的模拟器","authors":"Daniel Brüderle, Johannes Bill, Bernhard A. Kaplan, J. Kremkow, K. Meier, Eric Müller, J. Schemmel","doi":"10.1109/ISCAS.2010.5537004","DOIUrl":null,"url":null,"abstract":"We will set up a fully functional system consisting of a custom design hardware framework (Figures 1 and 2) with the neural network chips described in the appended 4-page paper, Section II-A. The framework is connected digitally to a host PC, on which we will run a software that provides the simulator-like, flexible and non-expert usability of the neuromorphic device as described in the appended paper, Section II-B. We will also connect an oscilloscope via which arbitrarily selectable neuron membranes or other analog parameters can be recorded directly from the chips.","PeriodicalId":91083,"journal":{"name":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","volume":"49 1","pages":"2783"},"PeriodicalIF":0.0000,"publicationDate":"2010-08-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Live demonstration: Simulator-like exploration of cortical network architectures with a mixed-signal VLSI system\",\"authors\":\"Daniel Brüderle, Johannes Bill, Bernhard A. Kaplan, J. Kremkow, K. Meier, Eric Müller, J. Schemmel\",\"doi\":\"10.1109/ISCAS.2010.5537004\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We will set up a fully functional system consisting of a custom design hardware framework (Figures 1 and 2) with the neural network chips described in the appended 4-page paper, Section II-A. The framework is connected digitally to a host PC, on which we will run a software that provides the simulator-like, flexible and non-expert usability of the neuromorphic device as described in the appended paper, Section II-B. We will also connect an oscilloscope via which arbitrarily selectable neuron membranes or other analog parameters can be recorded directly from the chips.\",\"PeriodicalId\":91083,\"journal\":{\"name\":\"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems\",\"volume\":\"49 1\",\"pages\":\"2783\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-08-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.2010.5537004\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Symposium on Circuits and Systems proceedings. IEEE International Symposium on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2010.5537004","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Live demonstration: Simulator-like exploration of cortical network architectures with a mixed-signal VLSI system
We will set up a fully functional system consisting of a custom design hardware framework (Figures 1 and 2) with the neural network chips described in the appended 4-page paper, Section II-A. The framework is connected digitally to a host PC, on which we will run a software that provides the simulator-like, flexible and non-expert usability of the neuromorphic device as described in the appended paper, Section II-B. We will also connect an oscilloscope via which arbitrarily selectable neuron membranes or other analog parameters can be recorded directly from the chips.