Viterbi解码器中MSB-first加比较选择单元结构的新型流水线

K. Parhi
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引用次数: 4

摘要

卷积码以其优异的误差控制性能在通信系统中得到了广泛的应用。卷积码的高速维特比解码器对高数据速率应用非常有兴趣。本文提出了一种改进的最有效位(MSB)优先位级流水添加比较选择(ACS)单元结构。ACS单元是维特比译码器译码速度的主要瓶颈。通过平衡ACS单元中不同路径的稳定时间,使关键路径的长度尽可能地减小到ACS单元中的迭代界。与传统的MSB-first结构相比,采用拟议的重新定时结构可以将ACS装置的关键路径减少12%至15%。关键路径的减少可以将非常高速(例如10 Gbps)的维特比解码器所需的并行度(和面积)降低约25%。
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Novel pipelining of MSB-first add-compare select unit structure for Viterbi decoders
The convolutional codes are widely used in many communication systems due to their excellent error control performance. High speed Viterbi decoders for convolutional codes are of great interest for high data rate applications. In this paper, an improved most-significant-bit (MSB)-first bit-level pipelined add-compare select (ACS) unit structure is proposed. The ACS unit is the main bottleneck on the decoding speed of a Viterbi decoder. By balancing the settling time of different paths in the ACS unit, the length of the critical path is reduced as close as possible to the iteration bound in the ACS unit. With the proposed retimed structure, it is possible to decrease the critical path of the ACS unit by 12 to 15% compared with the conventional MSB-first structures. This reduction in critical path can reduce the level of parallelism (and area) required for a very highspeed (such as 10 Gbps) Viterbi decoder by about 25%.
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