{"title":"基于p衬底n阱分布式栅格电感的5.5GHz LC振荡器设计","authors":"S. A. E. A. Rahim, A. Barakat, R. Pokharel","doi":"10.1109/APCCAS.2016.7803949","DOIUrl":null,"url":null,"abstract":"This paper presents the design of low noise LC oscillator that employs an enhanced inductor, where a distributed grid of N-well in P-substrate of the inductor was design to improve the quality factor of the inductor, therefore improves the phase noise of the oscillator. The electromagnetic (EM) simulation shows that the total equivalent resistance of an inductor is reduced, which results in a higher quality factor. A 5.5GHz cross-coupled CMOS LC oscillator is designed by using this new inductor. Based on the simulation results, the oscillator shows an improvement of 0.7 dBc/Hz in phase noise at 1MHz offset from the carrier, which results a FOM of 189.","PeriodicalId":6495,"journal":{"name":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design of 5.5GHz LC oscillator using distributed grid of N-well in P-substrate inductor\",\"authors\":\"S. A. E. A. Rahim, A. Barakat, R. Pokharel\",\"doi\":\"10.1109/APCCAS.2016.7803949\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design of low noise LC oscillator that employs an enhanced inductor, where a distributed grid of N-well in P-substrate of the inductor was design to improve the quality factor of the inductor, therefore improves the phase noise of the oscillator. The electromagnetic (EM) simulation shows that the total equivalent resistance of an inductor is reduced, which results in a higher quality factor. A 5.5GHz cross-coupled CMOS LC oscillator is designed by using this new inductor. Based on the simulation results, the oscillator shows an improvement of 0.7 dBc/Hz in phase noise at 1MHz offset from the carrier, which results a FOM of 189.\",\"PeriodicalId\":6495,\"journal\":{\"name\":\"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APCCAS.2016.7803949\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS.2016.7803949","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of 5.5GHz LC oscillator using distributed grid of N-well in P-substrate inductor
This paper presents the design of low noise LC oscillator that employs an enhanced inductor, where a distributed grid of N-well in P-substrate of the inductor was design to improve the quality factor of the inductor, therefore improves the phase noise of the oscillator. The electromagnetic (EM) simulation shows that the total equivalent resistance of an inductor is reduced, which results in a higher quality factor. A 5.5GHz cross-coupled CMOS LC oscillator is designed by using this new inductor. Based on the simulation results, the oscillator shows an improvement of 0.7 dBc/Hz in phase noise at 1MHz offset from the carrier, which results a FOM of 189.