{"title":"c类振荡器的FoM优化","authors":"Alireza Nourbakhsh, A. Safarian, Sanaz Sadeghi","doi":"10.24200/sci.2023.57472.5313","DOIUrl":null,"url":null,"abstract":"—In this paper, a new approach to optimize phase noise and Figure-of-Merit (FoM) in class-C oscillators is presented. This approach recruits DC voltage of the common source node of the switching pair transistors as an indicator to achieve the best performance of a class-C oscillator. The proposed indicator has the advantages of not introducing any loading effect to the output node, and independency from PVT changes. The method is simple and applicable to any oscillator with class-C topology, and with some modifications it would be applied to other oscillator topologies like class-B. The idea is verified using theoretical analysis, and circuit simulations on 0.18 µ m CMOS technology at 2GHz oscillation frequency. Moreover, a discrete prototype is fabricated at 15MHz and measurement results are provided which further validate feasibility of this approach.","PeriodicalId":21605,"journal":{"name":"Scientia Iranica","volume":null,"pages":null},"PeriodicalIF":1.4000,"publicationDate":"2023-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"FoM Optimization in Class-C Oscillators\",\"authors\":\"Alireza Nourbakhsh, A. Safarian, Sanaz Sadeghi\",\"doi\":\"10.24200/sci.2023.57472.5313\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"—In this paper, a new approach to optimize phase noise and Figure-of-Merit (FoM) in class-C oscillators is presented. This approach recruits DC voltage of the common source node of the switching pair transistors as an indicator to achieve the best performance of a class-C oscillator. The proposed indicator has the advantages of not introducing any loading effect to the output node, and independency from PVT changes. The method is simple and applicable to any oscillator with class-C topology, and with some modifications it would be applied to other oscillator topologies like class-B. The idea is verified using theoretical analysis, and circuit simulations on 0.18 µ m CMOS technology at 2GHz oscillation frequency. Moreover, a discrete prototype is fabricated at 15MHz and measurement results are provided which further validate feasibility of this approach.\",\"PeriodicalId\":21605,\"journal\":{\"name\":\"Scientia Iranica\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":1.4000,\"publicationDate\":\"2023-06-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Scientia Iranica\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://doi.org/10.24200/sci.2023.57472.5313\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, MULTIDISCIPLINARY\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Scientia Iranica","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.24200/sci.2023.57472.5313","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, MULTIDISCIPLINARY","Score":null,"Total":0}
—In this paper, a new approach to optimize phase noise and Figure-of-Merit (FoM) in class-C oscillators is presented. This approach recruits DC voltage of the common source node of the switching pair transistors as an indicator to achieve the best performance of a class-C oscillator. The proposed indicator has the advantages of not introducing any loading effect to the output node, and independency from PVT changes. The method is simple and applicable to any oscillator with class-C topology, and with some modifications it would be applied to other oscillator topologies like class-B. The idea is verified using theoretical analysis, and circuit simulations on 0.18 µ m CMOS technology at 2GHz oscillation frequency. Moreover, a discrete prototype is fabricated at 15MHz and measurement results are provided which further validate feasibility of this approach.
期刊介绍：
The objectives of Scientia Iranica are two-fold. The first is to provide a forum for the presentation of original works by scientists and engineers from around the world. The second is to open an effective channel to enhance the level of communication between scientists and engineers and the exchange of state-of-the-art research and ideas.
The scope of the journal is broad and multidisciplinary in technical sciences and engineering. It encompasses theoretical and experimental research. Specific areas include but not limited to chemistry, chemical engineering, civil engineering, control and computer engineering, electrical engineering, material, manufacturing and industrial management, mathematics, mechanical engineering, nuclear engineering, petroleum engineering, physics, nanotechnology.
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