{"title":"低功耗高速V级超大规模集成电路设计,通过级间合作实现低电源电压","authors":"T. Sakurai","doi":"10.1109/ISQED.2002.996786","DOIUrl":null,"url":null,"abstract":"In this paper, methods to achieve low-power and high-speed VLSI's are described with the emphasis on cooperation between levels. To suppress the leakage current in a standby mode, Boosted Gate MOS (BGMOS) is effective, which is based on cooperation between technology level and circuit level. To reduce the power in an active mode, V/sub DD/-hopping and V/sub TH/-hopping are promising, which are cooperative approaches between circuit and software. The power consumed in an interconnect system is another issue in low-voltage deep-submicron designs. A cooperative approach between VLSI and assembly to the interconnect power problem is also discussed.","PeriodicalId":20510,"journal":{"name":"Proceedings International Symposium on Quality Electronic Design","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Low-power and high-speed V VLSI design with low supply voltage through cooperation between levels\",\"authors\":\"T. Sakurai\",\"doi\":\"10.1109/ISQED.2002.996786\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, methods to achieve low-power and high-speed VLSI's are described with the emphasis on cooperation between levels. To suppress the leakage current in a standby mode, Boosted Gate MOS (BGMOS) is effective, which is based on cooperation between technology level and circuit level. To reduce the power in an active mode, V/sub DD/-hopping and V/sub TH/-hopping are promising, which are cooperative approaches between circuit and software. The power consumed in an interconnect system is another issue in low-voltage deep-submicron designs. A cooperative approach between VLSI and assembly to the interconnect power problem is also discussed.\",\"PeriodicalId\":20510,\"journal\":{\"name\":\"Proceedings International Symposium on Quality Electronic Design\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings International Symposium on Quality Electronic Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISQED.2002.996786\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Symposium on Quality Electronic Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2002.996786","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
摘要
本文介绍了实现低功耗和高速VLSI的方法,重点是级间协作。为了抑制待机状态下的漏电流,boost Gate MOS (BGMOS)是一种有效的抑制漏电流的方法,它是基于技术层面和电路层面的协同工作。为了降低有源模式下的功率,V/sub DD/跳频和V/sub TH/跳频是一种很有前途的电路与软件的合作方式。在低电压深亚微米设计中,互连系统的功耗是另一个问题。讨论了超大规模集成电路与集成电路合作解决互连功率问题的方法。
Low-power and high-speed V VLSI design with low supply voltage through cooperation between levels
In this paper, methods to achieve low-power and high-speed VLSI's are described with the emphasis on cooperation between levels. To suppress the leakage current in a standby mode, Boosted Gate MOS (BGMOS) is effective, which is based on cooperation between technology level and circuit level. To reduce the power in an active mode, V/sub DD/-hopping and V/sub TH/-hopping are promising, which are cooperative approaches between circuit and software. The power consumed in an interconnect system is another issue in low-voltage deep-submicron designs. A cooperative approach between VLSI and assembly to the interconnect power problem is also discussed.