{"title":"一个快速的全集成LDO与紧凑的尺寸和低智商的SoC应用","authors":"Chunfeng Bai, Kai Zhang","doi":"10.1109/ICICM54364.2021.9660274","DOIUrl":null,"url":null,"abstract":"Fully integrated LDOs are analyzed in this paper. Focused on SoC applications, a 20-mA 1.2-V full-on-chip NMOS LDO with fast transient response is designed. Compact size and low quiescent current are obtained owning the proposed adaptive biasing circuits. With only 7$-\\mu$A quiescent current, the response time to 100X positive load current step in 1-ns is only 60-ns.","PeriodicalId":6693,"journal":{"name":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2021-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Fast Fully-Integrated LDO with Compact-Size and LOW-IQ for SoC Applications\",\"authors\":\"Chunfeng Bai, Kai Zhang\",\"doi\":\"10.1109/ICICM54364.2021.9660274\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Fully integrated LDOs are analyzed in this paper. Focused on SoC applications, a 20-mA 1.2-V full-on-chip NMOS LDO with fast transient response is designed. Compact size and low quiescent current are obtained owning the proposed adaptive biasing circuits. With only 7$-\\\\mu$A quiescent current, the response time to 100X positive load current step in 1-ns is only 60-ns.\",\"PeriodicalId\":6693,\"journal\":{\"name\":\"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-10-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICM54364.2021.9660274\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 6th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM54364.2021.9660274","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
本文分析了完全集成的贷款抵押贷款。针对SoC应用，设计了具有快速瞬态响应的20 ma 1.2 v全片NMOS LDO。该自适应偏置电路具有体积小、静态电流小等优点。当静态电流仅为7 μ A时，在1-ns内对100X正负载电流阶跃的响应时间仅为60-ns。
A Fast Fully-Integrated LDO with Compact-Size and LOW-IQ for SoC Applications
Fully integrated LDOs are analyzed in this paper. Focused on SoC applications, a 20-mA 1.2-V full-on-chip NMOS LDO with fast transient response is designed. Compact size and low quiescent current are obtained owning the proposed adaptive biasing circuits. With only 7$-\mu$A quiescent current, the response time to 100X positive load current step in 1-ns is only 60-ns.
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