An overview of microcode-based and FSM-based programmable memory built-in self test (MBIST) controller for coupling fault detection

Microcode-based and FSM-based controllers are two widely known architectures used for programmable memory built-in self test. These techniques are popular because of their flexibility of programming new test algorithms. In this paper, the architectures for both controllers are designed to implement a new test algorithm MARCH SAM that gives a better fault coverage in detecting single-cell fault and all intra-word coupling fault (CF).The components of each controllers are studied and designed. Both of the controllers are written using Verilog HDL and implemented in Altera Cyclone II FPGA. The simulation and synthesis results of both architectures are presented. Further analysis of the logic area usage and flexibility of these controllers are done on the synthesis results. The performance of each controller is compared in term of speed and area overhead.