CMOS 12位4mhz流水线A/D转换器与交换反馈电容

Jungwook Yang, Hae-Seung Lee
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引用次数: 18

摘要

提出了一种采用整流反馈电容开关的2位/级CMOS 12位4mhz流水线A/D转换器(ADC)。该技术无需使用复杂的校准电路,也不需要额外的校准周期,从而提高了DNL。大约,12位ADC只需要7位匹配的电容器。在增益增强的折叠级联放大器中,通过操作三极管区域的输出级晶体管可以实现非常高的输出摆幅。这款12位流水线ADC集成在标准的0.8 /spl mu/m单聚三金属CMOS工艺中,功耗为45 mW。
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A CMOS 12-bit 4 MHz pipelined A/D converter with commutative feedback capacitor
A 2-bit/stage CMOS 12-bit 4 MHz pipelined A/D converter (ADC) using commutated feedback capacitor switching scheme is presented. The technique improves the DNL without using complicated calibration circuitry, nor requiring extra calibration cycle. Approximately, only 7-bit matched capacitors are required for 12-bit ADC's. Very high output swing is achieved in a gain enhanced folded cascode amplifier by operating output stage transistors in the triode region. This 12-bit pipelined ADC is integrated in a standard 0.8 /spl mu/m single poly, triple metal CMOS process, and dissipates 45 mW.
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CiteScore
3.80
自引率
0.00%
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