Fast and accurate back propagation method for reliability evaluation of logic circuits

Paper presents an enhanced method for computation of logic gates' observabilities at circuit outputs, which are used as technology-independent metric for circuit reliability. When bit-parallel simulation is being applied, circuit's ability to propagate errors from each certain gate to its outputs is presented as set of ODC (observability-don't-care) masks. Proposed method for calculating ODCs is based on both direct error simulation and back propagation, being accurate as former in presence of reconvergent branches and almost as fast as latter in their absence. In addition, reconvergence handling is further improved by implementation of reduced circuit structure. Proposed algorithm has been applied to ISCAS85 benchmark circuits and then compared to error simulation and back propagation algorithms. Thus it is proven to provide accurate ODCs for given sequence of input sets being considerably faster than complete simulation. Results of computational experiments are also present in paper.