{"title":"具有自校准14位线性的CMOS 4位MDAC，用于高分辨率流水线A/D转换器","authors":"Joao Goes, J. Vital, Jose E. Franca","doi":"10.1109/CICC.1996.510522","DOIUrl":null,"url":null,"abstract":"This paper presents an integrated 4-bit MDAC for highspeed high-resolution pipelined ADCs which employs a code-by-code analogue self-calibration technique. Measured results from the prototypes fabricated in a 1.0 /spl mu/m CMOS technology show that the proposed self-calibration technique corrects the MDAC linearity and the interstage gain to the 14-bit level, while allowing conversion rates in the MHz range.","PeriodicalId":74515,"journal":{"name":"Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference","volume":"86 1 1","pages":"105-108"},"PeriodicalIF":0.0000,"publicationDate":"1996-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"A CMOS 4-bit MDAC with self-calibrated 14-bit linearity for high-resolution pipelined A/D converters\",\"authors\":\"Joao Goes, J. Vital, Jose E. Franca\",\"doi\":\"10.1109/CICC.1996.510522\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an integrated 4-bit MDAC for highspeed high-resolution pipelined ADCs which employs a code-by-code analogue self-calibration technique. Measured results from the prototypes fabricated in a 1.0 /spl mu/m CMOS technology show that the proposed self-calibration technique corrects the MDAC linearity and the interstage gain to the 14-bit level, while allowing conversion rates in the MHz range.\",\"PeriodicalId\":74515,\"journal\":{\"name\":\"Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference\",\"volume\":\"86 1 1\",\"pages\":\"105-108\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-05-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1996.510522\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the ... Custom Integrated Circuits Conference. Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1996.510522","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A CMOS 4-bit MDAC with self-calibrated 14-bit linearity for high-resolution pipelined A/D converters
This paper presents an integrated 4-bit MDAC for highspeed high-resolution pipelined ADCs which employs a code-by-code analogue self-calibration technique. Measured results from the prototypes fabricated in a 1.0 /spl mu/m CMOS technology show that the proposed self-calibration technique corrects the MDAC linearity and the interstage gain to the 14-bit level, while allowing conversion rates in the MHz range.
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