{"title":"硅体厚度对不同接平面结构双栅UTBB SOI mosfet仿真的影响","authors":"N. Othman, M. Arshad, S. Sabki, U. Hashim","doi":"10.1109/RSM.2015.7354985","DOIUrl":null,"url":null,"abstract":"In this work, we investigate the impact of varying silicon-body thickness, Tsi i.e 5 nm, 7 nm, 10 nm and 12 nm on the digital figures-of-merit performance of Ultra-Thin Body and Buried Oxide (UTBB) SOI MOSFETs of 10 nm gate length with different ground plane (GP) structures under the double-gate (DG) operation-mode. We show that degradations of the digital characteristics i.e DIBL, subthreshold-slope (SS) and Ioff occur with an increased in Tsi. Meanwhile, no significant improvement in Ion is observed with the reduction in Tsi whereas thicker Tsi produces a slightly higher transconductance, gm. In terms of the impact of different GP structures, significant variations in DIBL and SS is observed with thicker Tsi as different GP structure is employed, and these variations are gradually suppressed when Tsi is decreased. In other words, advantages of different GP structures are not significantly apparent at thinner Tsi.","PeriodicalId":6667,"journal":{"name":"2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)","volume":"16 1","pages":"1-4"},"PeriodicalIF":0.0000,"publicationDate":"2015-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Impact of silicon-body thickness on emulation of double-gate UTBB SOI MOSFETs with different ground plane structures\",\"authors\":\"N. Othman, M. Arshad, S. Sabki, U. Hashim\",\"doi\":\"10.1109/RSM.2015.7354985\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this work, we investigate the impact of varying silicon-body thickness, Tsi i.e 5 nm, 7 nm, 10 nm and 12 nm on the digital figures-of-merit performance of Ultra-Thin Body and Buried Oxide (UTBB) SOI MOSFETs of 10 nm gate length with different ground plane (GP) structures under the double-gate (DG) operation-mode. We show that degradations of the digital characteristics i.e DIBL, subthreshold-slope (SS) and Ioff occur with an increased in Tsi. Meanwhile, no significant improvement in Ion is observed with the reduction in Tsi whereas thicker Tsi produces a slightly higher transconductance, gm. In terms of the impact of different GP structures, significant variations in DIBL and SS is observed with thicker Tsi as different GP structure is employed, and these variations are gradually suppressed when Tsi is decreased. In other words, advantages of different GP structures are not significantly apparent at thinner Tsi.\",\"PeriodicalId\":6667,\"journal\":{\"name\":\"2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)\",\"volume\":\"16 1\",\"pages\":\"1-4\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RSM.2015.7354985\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RSM.2015.7354985","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
在这项工作中,我们研究了不同硅体厚度Tsi(即5 nm, 7 nm, 10 nm和12 nm)对双栅极(DG)工作模式下具有不同接平面(GP)结构的10 nm栅极长度的超薄体和埋地氧化物(UTBB) SOI mosfet的数字性能的影响。我们发现,随着Tsi的增加,数字特性,即DIBL,阈值下斜率(SS)和Ioff都会发生退化。同时,随着Tsi的降低,离子没有明显的改善,而较厚的Tsi会产生稍高的跨导,gm。在不同GP结构的影响下,随着不同GP结构的使用,较厚的Tsi可以观察到DIBL和SS的显著变化,而随着Tsi的降低,这些变化会逐渐被抑制。换句话说,不同GP结构的优势在较薄的Tsi上并不明显。
Impact of silicon-body thickness on emulation of double-gate UTBB SOI MOSFETs with different ground plane structures
In this work, we investigate the impact of varying silicon-body thickness, Tsi i.e 5 nm, 7 nm, 10 nm and 12 nm on the digital figures-of-merit performance of Ultra-Thin Body and Buried Oxide (UTBB) SOI MOSFETs of 10 nm gate length with different ground plane (GP) structures under the double-gate (DG) operation-mode. We show that degradations of the digital characteristics i.e DIBL, subthreshold-slope (SS) and Ioff occur with an increased in Tsi. Meanwhile, no significant improvement in Ion is observed with the reduction in Tsi whereas thicker Tsi produces a slightly higher transconductance, gm. In terms of the impact of different GP structures, significant variations in DIBL and SS is observed with thicker Tsi as different GP structure is employed, and these variations are gradually suppressed when Tsi is decreased. In other words, advantages of different GP structures are not significantly apparent at thinner Tsi.