{"title":"具有自适应补偿单界迟滞控制的10MHz 92.1%效率绿模自动可重构开关变换器","authors":"Chen Zheng, D. Ma","doi":"10.1109/ISSCC.2010.5433986","DOIUrl":null,"url":null,"abstract":"Nowadays switching DC-DC converters have become indispensable in power-efficient VLSI systems. As operation frequency increases, load fluctuations in such a device require high switching frequencies in DC-DC converters for fast transient response. Meanwhile, as the switching frequency, fs, increases, sizes of inductors (Ls) and capacitors (Cs) decrease with fs, allowing the use of smaller off-chip or even on-chip Ls and Cs. This not only reduces cost and space, but also allows a larger or better battery to be used, which in turn, improves the system run-time and performance. However, as fs increases, power loss at the power stage will increase roughly with √fs [1]. The efficiency is thus sacrificed for high-frequency operations. For example, for a converter that achieves 90% efficiency at 1MHz, when fs is increased to 10 MHz, power loss goes up by √10 times, causing the efficiency to drop below 70% [1]. On the other hand, as semiconductor industry is facing unprecedented power crisis, numerous power-management techniques have been recently developed. One major technique is called dynamic voltage scaling (DVS), in which a variable-output DC-DC converter is usually adopted to adjust supply voltage and operation frequency, based on instantaneous workload. Buck converter topology has been widely used for these applications. However, because a non-inverting flyback converter can achieve both step-up and step-down conversions, such a structure is more desirable in DVS-based applications to maximize power saving with a wider supply range [2]. However, compared to buck or boost converters, a non-inverting flyback converter requires two additional switches. As a result, both switching and conduction loss are doubled. Furthermore, the converter efficiency is greatly degraded (as shown in Fig. 10.5.1). However, it exhibits an obvious advantage when Vout is close to Vg, where the buck or boost converter experiences a sharp increase in power loss. In addition, as the duty ratio approaches 100%, the discharge (charge) period for a buck (boost) converter becomes extremely short, forcing the inductor to be charged at a much higher current level. It thus leads to significant power loss and switching noise, and imposes severe design constraints on the transient responses of the controller and buffers.","PeriodicalId":6418,"journal":{"name":"2010 IEEE International Solid-State Circuits Conference - (ISSCC)","volume":"35 1","pages":"204-205"},"PeriodicalIF":0.0000,"publicationDate":"2010-03-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"39","resultStr":"{\"title\":\"A 10MHz 92.1%-efficiency green-mode automatic reconfigurable switching converter with adaptively compensated single-bound hysteresis control\",\"authors\":\"Chen Zheng, D. Ma\",\"doi\":\"10.1109/ISSCC.2010.5433986\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Nowadays switching DC-DC converters have become indispensable in power-efficient VLSI systems. As operation frequency increases, load fluctuations in such a device require high switching frequencies in DC-DC converters for fast transient response. Meanwhile, as the switching frequency, fs, increases, sizes of inductors (Ls) and capacitors (Cs) decrease with fs, allowing the use of smaller off-chip or even on-chip Ls and Cs. This not only reduces cost and space, but also allows a larger or better battery to be used, which in turn, improves the system run-time and performance. However, as fs increases, power loss at the power stage will increase roughly with √fs [1]. The efficiency is thus sacrificed for high-frequency operations. For example, for a converter that achieves 90% efficiency at 1MHz, when fs is increased to 10 MHz, power loss goes up by √10 times, causing the efficiency to drop below 70% [1]. On the other hand, as semiconductor industry is facing unprecedented power crisis, numerous power-management techniques have been recently developed. One major technique is called dynamic voltage scaling (DVS), in which a variable-output DC-DC converter is usually adopted to adjust supply voltage and operation frequency, based on instantaneous workload. Buck converter topology has been widely used for these applications. However, because a non-inverting flyback converter can achieve both step-up and step-down conversions, such a structure is more desirable in DVS-based applications to maximize power saving with a wider supply range [2]. However, compared to buck or boost converters, a non-inverting flyback converter requires two additional switches. As a result, both switching and conduction loss are doubled. Furthermore, the converter efficiency is greatly degraded (as shown in Fig. 10.5.1). However, it exhibits an obvious advantage when Vout is close to Vg, where the buck or boost converter experiences a sharp increase in power loss. In addition, as the duty ratio approaches 100%, the discharge (charge) period for a buck (boost) converter becomes extremely short, forcing the inductor to be charged at a much higher current level. It thus leads to significant power loss and switching noise, and imposes severe design constraints on the transient responses of the controller and buffers.\",\"PeriodicalId\":6418,\"journal\":{\"name\":\"2010 IEEE International Solid-State Circuits Conference - (ISSCC)\",\"volume\":\"35 1\",\"pages\":\"204-205\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-03-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"39\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 IEEE International Solid-State Circuits Conference - (ISSCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2010.5433986\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE International Solid-State Circuits Conference - (ISSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2010.5433986","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 10MHz 92.1%-efficiency green-mode automatic reconfigurable switching converter with adaptively compensated single-bound hysteresis control
Nowadays switching DC-DC converters have become indispensable in power-efficient VLSI systems. As operation frequency increases, load fluctuations in such a device require high switching frequencies in DC-DC converters for fast transient response. Meanwhile, as the switching frequency, fs, increases, sizes of inductors (Ls) and capacitors (Cs) decrease with fs, allowing the use of smaller off-chip or even on-chip Ls and Cs. This not only reduces cost and space, but also allows a larger or better battery to be used, which in turn, improves the system run-time and performance. However, as fs increases, power loss at the power stage will increase roughly with √fs [1]. The efficiency is thus sacrificed for high-frequency operations. For example, for a converter that achieves 90% efficiency at 1MHz, when fs is increased to 10 MHz, power loss goes up by √10 times, causing the efficiency to drop below 70% [1]. On the other hand, as semiconductor industry is facing unprecedented power crisis, numerous power-management techniques have been recently developed. One major technique is called dynamic voltage scaling (DVS), in which a variable-output DC-DC converter is usually adopted to adjust supply voltage and operation frequency, based on instantaneous workload. Buck converter topology has been widely used for these applications. However, because a non-inverting flyback converter can achieve both step-up and step-down conversions, such a structure is more desirable in DVS-based applications to maximize power saving with a wider supply range [2]. However, compared to buck or boost converters, a non-inverting flyback converter requires two additional switches. As a result, both switching and conduction loss are doubled. Furthermore, the converter efficiency is greatly degraded (as shown in Fig. 10.5.1). However, it exhibits an obvious advantage when Vout is close to Vg, where the buck or boost converter experiences a sharp increase in power loss. In addition, as the duty ratio approaches 100%, the discharge (charge) period for a buck (boost) converter becomes extremely short, forcing the inductor to be charged at a much higher current level. It thus leads to significant power loss and switching noise, and imposes severe design constraints on the transient responses of the controller and buffers.