在FinFET技术节点中的假聚去除

2017 China Semiconductor Technology International Conference (CSTIC) Pub Date : 2017-03-12 DOI:10.1109/CSTIC.2017.7919784

Ruixuan Huang, Shi-liang Ji, Qiu-hua Han

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引用次数: 0

摘要

当CMOS技术达到14nm及以上时，采用FinFET进一步提高器件性能。假聚去除工艺是控制金属栅功函数、阈值电压和栅漏的关键工艺。在本文中，我们比较了3种不同的商用工具和2种不同的方法的干蚀刻工艺，表明通过适当的工艺和方法，栅极泄漏可以得到不止一个订单的改善。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Dummy poly removal in FinFET technology node

When CMOS technology reaches 14nm and beyond, FinFET is implemented to further improve the device performance. Dummy poly removal process works as a key process to control the work function of metal gate, threshold voltage, and gate leakage. In this paper, we compared the dry etch process on 3 different commercial tools with 2 different approaches which shows that the gate leakage could have more than an order's improvement with proper process and approach.

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2017 China Semiconductor Technology International Conference (CSTIC)

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