K. Tomobe, T. Takahashi, M. Kawashima, Y. Sonobe, T. Kiyuna, S. Yamamoto
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引用次数: 2
摘要
采用0.35 /spl mu/m CMOS工艺技术，研制了一种具有高速I/O电路的1860 kG CMOS门阵列。利用可直接接收和存储低电压摆幅信号的触发器电路，实现了300mhz数据在30cm线上的同步传输。与传统电路相比，该电路技术将2个lsi之间的数据传输延迟时间减少了1.7 ns。
A 1860 kG CMOS gate array with GTL input flip-flop circuits
A 1860 kG CMOS gate array with a high speed I/O circuit using 0.35 /spl mu/m CMOS process technology, has been developed. 300 MHz synchronous data transmission through a 30 cm line has been achieved with a flip-flop circuit which can directly receive and store a low voltage swing signal. This circuit technique reduces the latency time of data transmission between 2 LSIs by as much as 1.7 ns compared with conventional circuits.
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