{"title":"一种用于毫米波5G通信的CMOS带通低噪声放大器,具有优异的增益平坦度","authors":"Han-Woong Choi, Sunkyu Choi, Choul‐Young Kim","doi":"10.1109/IMS30576.2020.9224097","DOIUrl":null,"url":null,"abstract":"This paper presents a two-stage 24–32 GHz low-noise amplifier (LNA) with excellent gain flatness for wide bandwidth communication applications. A new band-pass type 2-stage common-source (CS) LNA configuration using the pole-tuning technique that actively exploits the parasitic capacitance of a CMOS device is proposed for bandwidth extension with low in-band gain variation. To demonstrate the feasibility of the proposed circuit configuration, a wideband LNA is implemented using a 65-nm CMOS process. The LNA shows a gain variation of ±0.19 dB in frequency band of 24 to 32 GHz with a peak gain of 18.64 dB and a noise figure of 2.27 dB while consuming 10.0 rnA from a 1V supply. The core circuit occupies an area of 0.23 × 0.43 mm2.","PeriodicalId":6784,"journal":{"name":"2020 IEEE/MTT-S International Microwave Symposium (IMS)","volume":"1 1","pages":"329-332"},"PeriodicalIF":0.0000,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A CMOS Band-Pass Low Noise Amplifier with Excellent Gain Flatness for mm-Wave 5G Communications\",\"authors\":\"Han-Woong Choi, Sunkyu Choi, Choul‐Young Kim\",\"doi\":\"10.1109/IMS30576.2020.9224097\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a two-stage 24–32 GHz low-noise amplifier (LNA) with excellent gain flatness for wide bandwidth communication applications. A new band-pass type 2-stage common-source (CS) LNA configuration using the pole-tuning technique that actively exploits the parasitic capacitance of a CMOS device is proposed for bandwidth extension with low in-band gain variation. To demonstrate the feasibility of the proposed circuit configuration, a wideband LNA is implemented using a 65-nm CMOS process. The LNA shows a gain variation of ±0.19 dB in frequency band of 24 to 32 GHz with a peak gain of 18.64 dB and a noise figure of 2.27 dB while consuming 10.0 rnA from a 1V supply. The core circuit occupies an area of 0.23 × 0.43 mm2.\",\"PeriodicalId\":6784,\"journal\":{\"name\":\"2020 IEEE/MTT-S International Microwave Symposium (IMS)\",\"volume\":\"1 1\",\"pages\":\"329-332\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE/MTT-S International Microwave Symposium (IMS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMS30576.2020.9224097\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE/MTT-S International Microwave Symposium (IMS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMS30576.2020.9224097","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A CMOS Band-Pass Low Noise Amplifier with Excellent Gain Flatness for mm-Wave 5G Communications
This paper presents a two-stage 24–32 GHz low-noise amplifier (LNA) with excellent gain flatness for wide bandwidth communication applications. A new band-pass type 2-stage common-source (CS) LNA configuration using the pole-tuning technique that actively exploits the parasitic capacitance of a CMOS device is proposed for bandwidth extension with low in-band gain variation. To demonstrate the feasibility of the proposed circuit configuration, a wideband LNA is implemented using a 65-nm CMOS process. The LNA shows a gain variation of ±0.19 dB in frequency band of 24 to 32 GHz with a peak gain of 18.64 dB and a noise figure of 2.27 dB while consuming 10.0 rnA from a 1V supply. The core circuit occupies an area of 0.23 × 0.43 mm2.