C. Zhan, P. Tzeng, J. Lau, M. Dai, H. Chien, Ching-Kuan Lee, Shang-Tsai Wu, K. Kao, Shin-Yi Huang, Chia-Wen Fan, Su-Ching Chung, Yu-wei Huang, Yu-Min Lin, Jing-Yao Chang, Tsung-Fu Yang, Tai-Hung Chen, R. Lo, M. Kao
{"title":"3D集成电路多芯片堆叠TSV/RDL/IPD介面器组装工艺及可靠性评估","authors":"C. Zhan, P. Tzeng, J. Lau, M. Dai, H. Chien, Ching-Kuan Lee, Shang-Tsai Wu, K. Kao, Shin-Yi Huang, Chia-Wen Fan, Su-Ching Chung, Yu-wei Huang, Yu-Min Lin, Jing-Yao Chang, Tsung-Fu Yang, Tai-Hung Chen, R. Lo, M. Kao","doi":"10.1109/ECTC.2012.6248883","DOIUrl":null,"url":null,"abstract":"In this study, a 3D IC integration system-in-package (SiP) with TSV/RDL/IPD interposer is designed and developed. Emphasis is placed on the Cu revealing, embedded stress sensors, non-destructive inspection, thermal modeling and measurement, and final assembly and reliability assessments.","PeriodicalId":6384,"journal":{"name":"2012 IEEE 62nd Electronic Components and Technology Conference","volume":"13 1","pages":"548-554"},"PeriodicalIF":0.0000,"publicationDate":"2012-07-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":"{\"title\":\"Assembly process and reliability assessment of TSV/RDL/IPD interposer with multi-chip-stacking for 3D IC integration SiP\",\"authors\":\"C. Zhan, P. Tzeng, J. Lau, M. Dai, H. Chien, Ching-Kuan Lee, Shang-Tsai Wu, K. Kao, Shin-Yi Huang, Chia-Wen Fan, Su-Ching Chung, Yu-wei Huang, Yu-Min Lin, Jing-Yao Chang, Tsung-Fu Yang, Tai-Hung Chen, R. Lo, M. Kao\",\"doi\":\"10.1109/ECTC.2012.6248883\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this study, a 3D IC integration system-in-package (SiP) with TSV/RDL/IPD interposer is designed and developed. Emphasis is placed on the Cu revealing, embedded stress sensors, non-destructive inspection, thermal modeling and measurement, and final assembly and reliability assessments.\",\"PeriodicalId\":6384,\"journal\":{\"name\":\"2012 IEEE 62nd Electronic Components and Technology Conference\",\"volume\":\"13 1\",\"pages\":\"548-554\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-07-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"17\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE 62nd Electronic Components and Technology Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.2012.6248883\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 62nd Electronic Components and Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2012.6248883","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Assembly process and reliability assessment of TSV/RDL/IPD interposer with multi-chip-stacking for 3D IC integration SiP
In this study, a 3D IC integration system-in-package (SiP) with TSV/RDL/IPD interposer is designed and developed. Emphasis is placed on the Cu revealing, embedded stress sensors, non-destructive inspection, thermal modeling and measurement, and final assembly and reliability assessments.
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