Computationally Efficient Algorithms and High-Speed ASIC design for Railway Gate Automation

Hundreds of deaths take place every year in developing countries like India due to improperly operated railway gates. Today, majority of level crossings are operated manually. This has several drawbacks, both social and economical. This paper proposes two algorithms that are meant to completely automate level crossings using Static and Doppler methods. Dynamic error correction methods have also been simulated. Socio-economic impacts have been analyzed. The algorithms developed here are designed to operate railway gates automatically, with minimal loss of time for the commuters on the road, without compromising on safety. Additional time based safety measures have also been incorporated. The static algorithm has also been theorized as ASIC hardware, where the entire automation process may be converted to circuitry. Functional block diagrams have been developed for the ASIC implementation.