无结与平面soin - mosfet晶体管尺寸变化的影响

2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM) Pub Date : 2015-08-01 DOI:10.1109/RSM.2015.7354983

A. Huda, M. K. Md Arshad, N. Othman, C. Voon, R. M. Ayub, S. Gopinath, K. L. Foo, A. R. Ruslinda, U. Hashim, H. C. Lee, P. Adelyn, S. M. Kahar

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引用次数: 4

摘要

本文采用数值模拟的方法，研究了硅体厚度(TSi)和硅体宽度(WSi)变化对100 nm栅长无结和结型绝缘子上硅(SOI)晶体管直流特性的影响。阈值电压(VTH)、通流、亚阈值电压和漏极降势垒等数字优值特性是研究的主要参数。仿真结果表明，与JLT相比，JT器件对TSi和WSi变化的敏感性较低。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Impact of size variation in junctionless vs junction planar SOI n-MOSFET transistor

In this paper, the effect of silicon body thickness (TSi) and silicon body width (WSi) variation on DC characteristics in 100 nm gate length silicon-on-insulator (SOI) junctionless (JL) and junction transistors has been investigated by using numerical simulations. The digital figure-of-merits characteristics such as threshold voltage (VTH), on-current, subthreshold voltage, and drain-induced-barrier-lowering are the main parameters that have been investigated. Based on the simulations, the JT device is less sensitive to variation of TSi and WSi compared to JLT.

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2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM)

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