Jung-Kyu Han, Jong-Woo Kim, Yujin Jang, Byunggu Kang, Jaewon Choi, G. Moon
{"title":"带保持时间补偿的效率优化非对称半桥变换器","authors":"Jung-Kyu Han, Jong-Woo Kim, Yujin Jang, Byunggu Kang, Jaewon Choi, G. Moon","doi":"10.1109/IPEMC.2016.7512649","DOIUrl":null,"url":null,"abstract":"In this paper, a new asymmetric half-bridge (AHB) converter integrated with hold-up time compensation circuit is proposed. The AHB converter is one of the most promising topologies in low-to-mid power applications because of zero-voltage switching (ZVS) of all switches and small number of components. But when the converter is designed considering the hold-up time condition, it has large transformer offset-current and small transformer turns-ratio. Although many researchers have studied to solve this problem, the advantages of conventional works are limited by losses from additional components. To solve this problem, a new AHB converter with an optimized efficiency is proposed in this paper. Since the proposed converter increases voltage gain using integrated boost converter during the hold-up time, it can be designed to obtain an optimized efficiency in nominal state, without losses from the additional components.","PeriodicalId":6857,"journal":{"name":"2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)","volume":"8 1","pages":"2254-2261"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Efficiency optimized asymmetric half-bridge converter with hold-up time compensation\",\"authors\":\"Jung-Kyu Han, Jong-Woo Kim, Yujin Jang, Byunggu Kang, Jaewon Choi, G. Moon\",\"doi\":\"10.1109/IPEMC.2016.7512649\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a new asymmetric half-bridge (AHB) converter integrated with hold-up time compensation circuit is proposed. The AHB converter is one of the most promising topologies in low-to-mid power applications because of zero-voltage switching (ZVS) of all switches and small number of components. But when the converter is designed considering the hold-up time condition, it has large transformer offset-current and small transformer turns-ratio. Although many researchers have studied to solve this problem, the advantages of conventional works are limited by losses from additional components. To solve this problem, a new AHB converter with an optimized efficiency is proposed in this paper. Since the proposed converter increases voltage gain using integrated boost converter during the hold-up time, it can be designed to obtain an optimized efficiency in nominal state, without losses from the additional components.\",\"PeriodicalId\":6857,\"journal\":{\"name\":\"2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)\",\"volume\":\"8 1\",\"pages\":\"2254-2261\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-05-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPEMC.2016.7512649\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPEMC.2016.7512649","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Efficiency optimized asymmetric half-bridge converter with hold-up time compensation
In this paper, a new asymmetric half-bridge (AHB) converter integrated with hold-up time compensation circuit is proposed. The AHB converter is one of the most promising topologies in low-to-mid power applications because of zero-voltage switching (ZVS) of all switches and small number of components. But when the converter is designed considering the hold-up time condition, it has large transformer offset-current and small transformer turns-ratio. Although many researchers have studied to solve this problem, the advantages of conventional works are limited by losses from additional components. To solve this problem, a new AHB converter with an optimized efficiency is proposed in this paper. Since the proposed converter increases voltage gain using integrated boost converter during the hold-up time, it can be designed to obtain an optimized efficiency in nominal state, without losses from the additional components.