使用射频脉冲技术的90nm以下间距Cu低k互连蚀刻解决方案

J. Liao, Y. T. Lai, Stan Wan, B. Kuo, P. Gopaladasu, David Wei, S. Yao, Wesley L. Lin, I. Wang, Paul Lin, Barrett Finch, S. Deshmukh
{"title":"使用射频脉冲技术的90nm以下间距Cu低k互连蚀刻解决方案","authors":"J. Liao, Y. T. Lai, Stan Wan, B. Kuo, P. Gopaladasu, David Wei, S. Yao, Wesley L. Lin, I. Wang, Paul Lin, Barrett Finch, S. Deshmukh","doi":"10.1109/IITC-MAM.2015.7325638","DOIUrl":null,"url":null,"abstract":"Self-aligned via (SAV) schemes are commonly used for back-end-of-line (BEOL) interconnect structures that have scaled to <; 90nm BEOL pitch [1]. In one implementation of this scheme, a TiN metal hard mask (MHM) is used for trench pattern definition, while the interconnect vias are patterned using a tri-layer resist mask such that the vias are self-aligned to the underlayer trench lines [2]. In this work, we describe a SAV etch process using RF pulsing in a capacitively coupled etch reactor that provides a solution to both via distortion / striation and critical dimension (CD) bias loading. Electrical results will be discussed.","PeriodicalId":6514,"journal":{"name":"2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM)","volume":"64 1","pages":"131-134"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Sub-90nm pitch Cu low-k interconnect etch solution using RF pulsing technology\",\"authors\":\"J. Liao, Y. T. Lai, Stan Wan, B. Kuo, P. Gopaladasu, David Wei, S. Yao, Wesley L. Lin, I. Wang, Paul Lin, Barrett Finch, S. Deshmukh\",\"doi\":\"10.1109/IITC-MAM.2015.7325638\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Self-aligned via (SAV) schemes are commonly used for back-end-of-line (BEOL) interconnect structures that have scaled to <; 90nm BEOL pitch [1]. In one implementation of this scheme, a TiN metal hard mask (MHM) is used for trench pattern definition, while the interconnect vias are patterned using a tri-layer resist mask such that the vias are self-aligned to the underlayer trench lines [2]. In this work, we describe a SAV etch process using RF pulsing in a capacitively coupled etch reactor that provides a solution to both via distortion / striation and critical dimension (CD) bias loading. Electrical results will be discussed.\",\"PeriodicalId\":6514,\"journal\":{\"name\":\"2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM)\",\"volume\":\"64 1\",\"pages\":\"131-134\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-05-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IITC-MAM.2015.7325638\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IITC-MAM.2015.7325638","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

自对准通孔(SAV)方案通常用于缩放到<;90nm BEOL间距[1]。在该方案的一种实现中,TiN金属硬掩模(MHM)用于沟槽图案定义,而互连过孔使用三层抗蚀剂掩模进行图图化,使过孔与底层沟槽线自对齐[2]。在这项工作中,我们描述了在电容耦合蚀刻反应器中使用RF脉冲的SAV蚀刻工艺,该工艺提供了通过扭曲/条纹和临界尺寸(CD)偏压加载的解决方案。电气结果将被讨论。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Sub-90nm pitch Cu low-k interconnect etch solution using RF pulsing technology
Self-aligned via (SAV) schemes are commonly used for back-end-of-line (BEOL) interconnect structures that have scaled to <; 90nm BEOL pitch [1]. In one implementation of this scheme, a TiN metal hard mask (MHM) is used for trench pattern definition, while the interconnect vias are patterned using a tri-layer resist mask such that the vias are self-aligned to the underlayer trench lines [2]. In this work, we describe a SAV etch process using RF pulsing in a capacitively coupled etch reactor that provides a solution to both via distortion / striation and critical dimension (CD) bias loading. Electrical results will be discussed.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
High-voltage monolithic 3D capacitors based on through-silicon-via technology Wafer level metallic bonding: Voiding mechanisms in copper layers A flexible top metal structure to improve ultra low-k reliability Nanostructured material formation for beyond Si devices Ni silicides formation: Use of Ge and Pt to study the diffusing species, lateral growth and relaxation mechanisms
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1