A 130nm canary SRAM for SRAM dynamic write VMIN tracking across voltage, frequency, and temperature variations

With device scaling in bulk technologies, process variation increases and SRAM VMIN scaling faces a bottleneck. Using peripheral assist techniques, we can lower the VMIN at the cost of energy and area. However, the SRAM VMIN is highly dependent on voltage, temperature, and operating frequency fluctuations, which are hard to determine in real time. Prior work shows theoretically that canary SRAMs using reverse assist can track SRAM dynamic write VMIN. In this paper, we show the first silicon results of a working 512b canary SRAM using bitline and wordline type reverse assists in a 130nm bulk technology. It has distinct canary failure trends across voltage, frequency, and temperature variations to track an 8Kb SRAM's dynamic write VMIN.