{"title":"磁盘写缓存的稳定内存","authors":"B.A. Coghlan, J.O. Jones","doi":"10.1016/0165-6074(95)90627-O","DOIUrl":null,"url":null,"abstract":"<div><p>Lack of I/O performance is fast becoming a limiting factor in many computing systems. The yearly doubling of CPU speeds is not being matched by corresponding gains in I/O performance. This paper explores one aspect of the architecture of a high performance fault-tolerant cached RAID subsystem for a multiprocessor. The disk write cache is implemented as a memory-mapped stable memory. The features of a VRAM-based stable memory and its associated RAID controller are discussed.</p></div>","PeriodicalId":100927,"journal":{"name":"Microprocessing and Microprogramming","volume":"41 1","pages":"Pages 53-70"},"PeriodicalIF":0.0000,"publicationDate":"1995-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1016/0165-6074(95)90627-O","citationCount":"1","resultStr":"{\"title\":\"Stable memory for a disk write cache\",\"authors\":\"B.A. Coghlan, J.O. Jones\",\"doi\":\"10.1016/0165-6074(95)90627-O\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>Lack of I/O performance is fast becoming a limiting factor in many computing systems. The yearly doubling of CPU speeds is not being matched by corresponding gains in I/O performance. This paper explores one aspect of the architecture of a high performance fault-tolerant cached RAID subsystem for a multiprocessor. The disk write cache is implemented as a memory-mapped stable memory. The features of a VRAM-based stable memory and its associated RAID controller are discussed.</p></div>\",\"PeriodicalId\":100927,\"journal\":{\"name\":\"Microprocessing and Microprogramming\",\"volume\":\"41 1\",\"pages\":\"Pages 53-70\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-04-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://sci-hub-pdf.com/10.1016/0165-6074(95)90627-O\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microprocessing and Microprogramming\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/016560749590627O\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microprocessing and Microprogramming","FirstCategoryId":"1085","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/016560749590627O","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Lack of I/O performance is fast becoming a limiting factor in many computing systems. The yearly doubling of CPU speeds is not being matched by corresponding gains in I/O performance. This paper explores one aspect of the architecture of a high performance fault-tolerant cached RAID subsystem for a multiprocessor. The disk write cache is implemented as a memory-mapped stable memory. The features of a VRAM-based stable memory and its associated RAID controller are discussed.